Exploring the Design Space of Future CMPs. - Jaehyuk Huh 001; Doug Burger; Stephen W. Keckler (IEEE PACT, 2001)

Exploiting ILP, TLP, and DLP with the Polymorphous TRIPS Architecture. - Karthikeyan Sankaralingam; Ramadass Nagarajan; Haiming Liu 001; Changkyu Kim; Jaehyuk Huh 001; Doug Burger; Stephen W. Keckler; Charles R. Moore (IEEE Micro, 2003)

Coherence decoupling: making use of incoherence. - Jaehyuk Huh 001; Jichuan Chang; Doug Burger; Gurindar S. Sohi (ASPLOS, 2004)

Speculative Incoherent Cache Protocols. - Jaehyuk Huh 001; Doug Burger; Jichuan Chang; Gurindar S. Sohi (IEEE Micro, 2004)

TRIPS: A polymorphous architecture for exploiting ILP, TLP, and DLP. - Karthikeyan Sankaralingam; Ramadass Nagarajan; Haiming Liu 001; Changkyu Kim; Jaehyuk Huh 001; Nitya Ranganathan; Doug Burger; Stephen W. Keckler; Robert G. McDonald; Charles R. Moore (ACM Trans. Archit. Code Optim., 2004)

A NUCA Substrate for Flexible CMP Cache Sharing. - Jaehyuk Huh 001; Changkyu Kim; Hazim Shafi; Lixin Zhang 002; Doug Burger; Stephen W. Keckler (IEEE Trans. Parallel Distributed Syst., 2007)

Cache bursts: A new approach for eliminating dead blocks and increasing cache efficiency. - Haiming Liu 001; Michael Ferdman; Jaehyuk Huh 001; Doug Burger (MICRO, 2008)

A methodology for extracting performance parameters in solid state disks (SSDs). - Jaehong Kim 006; Dawoon Jung 001; Jin-Soo Kim 001; Jaehyuk Huh 001 (MASCOTS, 2009)

HPCCD: Hybrid Parallel Continuous Collision Detection using CPUs and GPUs. - Duksu Kim; Jae-Pil Heo; Jaehyuk Huh 001; John Kim 001; Sung-Eui Yoon (Comput. Graph. Forum, 2009)

Subspace snooping: filtering snoops with operating system support. - Daehoon Kim; Jeongseob Ahn; Jaehong Kim 006; Jaehyuk Huh 001 (PACT, 2010)

The Effect of Multi-core on HPC Applications in Virtualized Systems. - Jaeung Han; Jeongseob Ahn; Changdae Kim; Youngjin Kwon; Young-ri Choi; Jaehyuk Huh 001 (Euro-Par Workshops, 2010)

Virtual Snooping: Filtering Snoops in Virtualized Multi-cores. - Daehoon Kim; Hwanju Kim; Jaehyuk Huh 001 (MICRO, 2010)

On-Chip Network Evaluation Framework. - Hanjoon Kim; Seulki Heo; Junghoon Lee; Jaehyuk Huh 001; John Kim 001 (SC, 2010)

Exploiting Mutual Awareness between Prefetchers and On-chip Networks in Multi-cores. - Junghoon Lee; Minjeong Shin; Hanjoon Kim; John Kim 001; Jaehyuk Huh 001 (PACT, 2011)

Secure MMU: Architectural support for memory isolation among virtual machines. - Seongwook Jin; Jaehyuk Huh 001 (DSN Workshops, 2011)

Virtualizing performance asymmetric multi-core systems. - Youngjin Kwon; Changdae Kim; Seungryoul Maeng; Jaehyuk Huh 001 (ISCA, 2011)

Architectural support for secure virtualization under a vulnerable hypervisor. - Seongwook Jin; Jeongseob Ahn; Sanghoon Cha; Jaehyuk Huh 001 (MICRO, 2011)

Sector log: fine-grained storage management for solid state drives. - Seongwook Jin; Jaehong Kim 006; Jaegeuk Kim; Jaehyuk Huh 001; Seungryoul Maeng (SAC, 2011)

Dynamic Virtual Machine Scheduling in Clouds for Architectural Shared Resources. - Jeongseob Ahn; Changdae Kim; Jaeung Han; Young-ri Choi; Jaehyuk Huh 001 (HotCloud, 2012)

Locality-aware dynamic VM reconfiguration on MapReduce clouds. - Jongse Park; DaeWoo Lee; Bokyeong Kim; Jaehyuk Huh 001; Seungryoul Maeng (HPDC, 2012)

Revisiting hardware-assisted page walks for virtualized systems. - Jeongseob Ahn; Seongwook Jin; Jaehyuk Huh 001 (ISCA, 2012)

Subspace Snooping: Exploiting Temporal Sharing Stability for Snoop Reduction. - Jeongseob Ahn; Daehoon Kim; Jaehong Kim 006; Jaehyuk Huh 001 (IEEE Trans. Computers, 2012)

Parameter-Aware I/O Management for Solid State Disks (SSDs). - Jaehong Kim 006; Sangwon Seo; Dawoon Jung 001; Jin-Soo Kim 001; Jaehyuk Huh 001 (IEEE Trans. Computers, 2012)

Revisiting Shared Cache Contention Problems: A Practical Hardware-Software Cooperative Approach. - Eunji Pak; Sang-Hoon Kim; Jaehyuk Huh 001; Seungryoul Maeng (IEICE Trans. Inf. Syst., 2013)

Author retrospective for a NUCA substrate for flexible CMP cache sharing. - Jaehyuk Huh 001; Changkyu Kim; Hazim Shafi; Lixin Zhang 002; Doug Burger; Stephen W. Keckler (ICS 25th Anniversary, 2014)

Micro-Sliced Virtual Processors to Hide the Effect of Discontinuous CPU Availability for Consolidated Systems. - Jeongseob Ahn; Chang Hyun Park 001; Jaehyuk Huh 001 (MICRO, 2014)

vCache: Providing a Transparent View of the LLC in Virtualized Environments. - Daehoon Kim; Hwanju Kim; Jaehyuk Huh 001 (IEEE Comput. Archit. Lett., 2014)

Mutually Aware Prefetcher and On-Chip Network Designs for Multi-Cores. - Junghoon Lee; Hanjoon Kim; Minjeong Shin; John Kim 001; Jaehyuk Huh 001 (IEEE Trans. Computers, 2014)

HePA: Hexagonal Platform Architecture for Smart Home Things. - Sangwon Seo; Jaehong Kim 006; Sangbae Yun; Jaehyuk Huh 001; Seungryoul Maeng (ICPADS, 2015)

Big or Little: A Study of Mobile Interactive Applications on an Asymmetric Multi-core Platform. - Wonik Seo; Daegil Im; Jeongim Choi; Jaehyuk Huh 001 (IISWC, 2015)

vCache: architectural support for transparent and isolated virtual LLCs in virtualized environments. - Daehoon Kim; Hwanju Kim; Nam Sung Kim; Jaehyuk Huh 001 (MICRO, 2015)

Hardware-Assisted Secure Resource Accounting under a Vulnerable Hypervisor. - Seongwook Jin; Jinho Seol; Jaehyuk Huh 001; Seungryoul Maeng (VEE, 2015)

Fast Two-Level Address Translation for Virtualized Systems. - Jeongseob Ahn; Seongwook Jin; Jaehyuk Huh 001 (IEEE Trans. Computers, 2015)

H-SVM: Hardware-Assisted Secure Virtual Machines under a Vulnerable Hypervisor. - Seongwook Jin; Jeongseob Ahn; Jinho Seol; Sanghoon Cha; Jaehyuk Huh 001; Seungryoul Maeng (IEEE Trans. Computers, 2015)

Interference Management for Distributed Parallel Applications in Consolidated Clusters. - Jaeung Han; Seungheun Jeon; Young-ri Choi; Jaehyuk Huh 001 (ASPLOS, 2016)

Dynamic prefetcher reconfiguration for diverse memory architectures. - Junghoon Lee; Taehoon Kim 001; Jaehyuk Huh 001 (ICCD, 2016)

Blind: Power saving color transform method for OLED displays. - Seikwon Kim; Shinyeong Hyun; Taekyung Heo; Daegil Im; Jaehyuk Huh 001 (ICCE, 2016)

Fairness-oriented OS Scheduling Support for Multicore Systems. - Changdae Kim; Jaehyuk Huh 001 (ICS, 2016)

Efficient Synonym Filtering and Scalable Delayed Translation for Hybrid Virtual Caching. - Chang Hyun Park 001; Taekyung Heo; Jaehyuk Huh 001 (ISCA, 2016)

Reducing the Memory Bandwidth Overheads of Hardware Security Support for Multi-Core Processors. - Junghoon Lee; Taehoon Kim 001; Jaehyuk Huh 001 (IEEE Trans. Computers, 2016)

Virtual Snooping Coherence for Multi-Core Virtualized Systems. - Daehoon Kim; Chang Hyun Park 001; Hwanju Kim; Jaehyuk Huh 001 (IEEE Trans. Parallel Distributed Syst., 2016)

A Trusted IaaS Environment with Hardware Security Module. - Jinho Seol; Seongwook Jin; DaeWoo Lee; Jaehyuk Huh 001; Seungryoul Maeng (IEEE Trans. Serv. Comput., 2016)

Transparent Dual Memory Compression Architecture. - Seikwon Kim; Seonyoung Lee; Taehoon Kim 001; Jaehyuk Huh 001 (PACT, 2017)

Janus: supporting heterogeneous power management in virtualized environments. - Daehoon Kim; Mohammad Alian; Jaehyuk Huh 001; Nam Sung Kim (SoCC, 2017)

Hybrid TLB Coalescing: Improving TLB Translation Coverage under Diverse Fragmented Memory Allocations. - Chang Hyun Park 001; Taekyung Heo; Jungi Jeong; Jaehyuk Huh 001 (ISCA, 2017)

Configuration Guidance Framework for Molecular Dynamics Simulations in Virtualized Clusters. - Jaeung Han; Changdae Kim; Jaehyuk Huh 001; Gil-Jin Jang; Young-ri Choi (IEEE Trans. Serv. Comput., 2017)

VIP: Virtual Performance-State for Efficient Power Management of Virtual Machines. - Ki-Dong Kang; Mohammad Alian; Daehoon Kim; Jaehyuk Huh 001; Nam Sung Kim (SoCC, 2018)

Secure In-memory Key-Value Storage with SGX. - Taehoon Kim 001; Joongun Park; Jae-Woo Chang; Seungheun Jeon; Jaehyuk Huh 001 (SoCC, 2018)

Accelerating critical OS services in virtualized systems with flexible micro-sliced cores. - Jeongseob Ahn; Chang Hyun Park 001; Taekyung Heo; Jaehyuk Huh 001 (EuroSys, 2018)

Efficient Hardware-Assisted Logging with Asynchronous and Direct-Update for Persistent Memory. - Jungi Jeong; Chang Hyun Park 001; Jaehyuk Huh 001; Seungryoul Maeng (MICRO, 2018)

Zebra Refresh: Value Transformation for Zero-Aware DRAM Refresh Reduction. - Seikwon Kim; Wonsang Kwak; Changdae Kim; Jaehyuk Huh 001 (IEEE Comput. Archit. Lett., 2018)

Exploring the Design Space of Fair Scheduling Supports for Asymmetric Multicore Systems. - Changdae Kim; Jaehyuk Huh 001 (IEEE Trans. Computers, 2018)

Heterogeneous Isolated Execution for Commodity GPUs. - Insu Jang; Adrian Tang; Taehoon Kim 001; Simha Sethumadhavan; Jaehyuk Huh 001 (ASPLOS, 2019)

ShieldStore: Shielded In-memory Key-value Storage with SGX. - Taehoon Kim 001; Joongun Park; Jaewook Woo; Seungheun Jeon; Jaehyuk Huh 001 (EuroSys, 2019)

Morphable DRAM Cache Design for Hybrid Memory Systems. - Sanghoon Cha; Bokyeong Kim; Chang Hyun Park 001; Jaehyuk Huh 001 (ACM Trans. Archit. Code Optim., 2019)

Disaggregated Cloud Memory with Elastic Block Management. - Kwangwon Koh; Kangho Kim; Seung-Hyub Jeon; Jaehyuk Huh 001 (IEEE Trans. Computers, 2019)

GVTS: Global Virtual Time Fair Scheduling to Support Strict Fairness on Many Cores. - Changdae Kim; Seungbeom Choi; Jaehyuk Huh 001 (IEEE Trans. Parallel Distributed Syst., 2019)

Decoupled Address Translation for Heterogeneous Memory Systems. - Bokyeong Kim; Soojin Hwang; Sanghoon Cha; Chang Hyun Park 001; Jongse Park; Jaehyuk Huh 001 (PACT, 2020)

Charge-Aware DRAM Refresh Reduction with Value Transformation. - Seikwon Kim; Wonsang Kwak; Changdae Kim; Daehyeon Baek; Jaehyuk Huh 001 (HPCA, 2020)

Perforated Page: Supporting Fragmented Memory Allocation for Large Pages. - Chang Hyun Park 001; Sanghoon Cha; Bokyeong Kim; Youngjin Kwon; David Black-Schaffer; Jaehyuk Huh 001 (ISCA, 2020)

Nested Enclave: Supporting Fine-grained Hierarchical Isolation with SGX. - Joongun Park; Naegyeong Kang; Taehoon Kim 001; Youngjin Kwon; Jaehyuk Huh 001 (ISCA, 2020)

Reconciling Time Slice Conflicts of Virtual Machines With Dual Time Slice for Clouds. - Taeklim Kim; Chang Hyun Park 001; Jaehyuk Huh 001; Jeongseob Ahn (IEEE Trans. Parallel Distributed Syst., 2020)

InnerSP: A Memory Efficient Sparse Matrix Multiplication Accelerator with Locality-Aware Inner Product Processing. - Daehyeon Baek; Soojin Hwang; Taekyung Heo; Daehoon Kim; Jaehyuk Huh 001 (PACT, 2021)

Common Counters: Compressed Encryption Counters for Secure GPU Memory. - Seonjin Na; Sunho Lee 002; Yeonjae Kim; Jongse Park; Jaehyuk Huh 001 (HPCA, 2021)

Ghost Routing to Enable Oblivious Computation on Memory-centric Networks. - Yeonju Ro; Seongwook Jin; Jaehyuk Huh 001; John Kim 001 (ISCA, 2021)

Hardware-assisted Trusted Memory Disaggregation for Secure Far Memory. - Taekyung Heo; Seunghyo Kang; Sanghyeon Lee; Soojin Hwang; Jaehyuk Huh 001 (CoRR, 2021)

Stockade: Hardware Hardening for Distributed Trusted Sandboxes. - Joongun Park; Seunghyo Kang; Sanghyeon Lee; Taehoon Kim 003; Jongse Park; Youngjin Kwon; Jaehyuk Huh 001 (CoRR, 2021)

Multi-model Machine Learning Inference Serving with GPU Spatial Partitioning. - Seungbeom Choi; Sunho Lee 002; Yeonjae Kim; Jongse Park; Youngjin Kwon; Jaehyuk Huh 001 (CoRR, 2021)

SLO-Aware Inference Scheduler for Heterogeneous Processors in Edge Platforms. - Wonik Seo; Sanghoon Cha; Yeonjae Kim; Jaehyuk Huh 001; Jongse Park (ACM Trans. Archit. Code Optim., 2021)

ZeroKernel: Secure Context-Isolated Execution on Commodity GPUs. - Ohmin Kwon 001; Yonggon Kim; Jaehyuk Huh 001; Hyunsoo Yoon (IEEE Trans. Dependable Secur. Comput., 2021)

TNPU: Supporting Trusted Execution with Tree-less Integrity Protection for Neural Processing Unit. - Sunho Lee 002; Jungwoo Kim 002; Seonjin Na; Jongse Park; Jaehyuk Huh 001 (HPCA, 2022)

Supporting Dynamic Translation Granularity for Hybrid Memory Systems. - Bokyeong Kim; Soojin Hwang; Sanghoon Cha; Chang Hyun Park 001; Jongse Park; Jaehyuk Huh 001 (ICCD, 2022)

Tunable Memory Protection for Secure Neural Processing Units. - Sunho Lee 002; Seonjin Na; Jungwoo Kim 002; Jongse Park; Jaehyuk Huh 001 (ICCD, 2022)

Serving Heterogeneous Machine Learning Models on Multi-GPU Servers with Spatio-Temporal Sharing. - Seungbeom Choi; Sunho Lee 002; Yeonjae Kim; Jongse Park; Youngjin Kwon; Jaehyuk Huh 001 (USENIX ATC, 2022)

Adaptive Page Migration Policy With Huge Pages in Tiered Memory Systems. - Taekyung Heo; Yang Wang; Wei Cui; Jaehyuk Huh 001; Lintao Zhang (IEEE Trans. Computers, 2022)

mNPUsim: Evaluating the Effect of Sharing Resources in Multi-core NPUs. - Soojin Hwang; Sunho Lee 002; Jungwoo Kim 002; Hongbeen Kim; Jaehyuk Huh 001 (IISWC, 2023)

Improving Data Reuse in NPU On-chip Memory with Interleaved Gradient Order for DNN Training. - Jungwoo Kim 002; Seonjin Na; Sanghyeon Lee; Sunho Lee 003; Jaehyuk Huh 001 (MICRO, 2023)

Supporting Secure Multi-GPU Computing with Dynamic and Batched Metadata Management. - Seonjin Na; Jungwoo Kim 002; Sunho Lee 002; Jaehyuk Huh 001 (HPCA, 2024)

Interference-Aware DNN Serving on Heterogeneous Processors in Edge Systems. - Yeonjae Kim; Igjae Kim; Kwanghoon Choi 003; Jeongseob Ahn; Jongse Park; Jaehyuk Huh 001 (ICCD, 2024)

pSyncPIM: Partially Synchronous Execution of Sparse Matrix Operations for All-Bank PIM Architectures. - Daehyeon Baek; Soojin Hwang; Jaehyuk Huh 001 (ISCA, 2024)

Supporting Trusted Virtual Machines with Hardware-Based Secure Remote Memory. - Taekyung Heo; Seunghyo Kang; Sanghyeon Lee; Soojin Hwang; Joongun Park; Jaehyuk Huh 001 (ISMM, 2024)

Hardware-hardened Sandbox Enclaves for Trusted Serverless Computing. - Joongun Park; Seunghyo Kang; Sanghyeon Lee; Taehoon Kim 001; Jongse Park; Youngjin Kwon; Jaehyuk Huh 001 (ACM Trans. Archit. Code Optim., 2024)

Cerberus: Triple Mode Acceleration of Sparse Matrix and Vector Multiplication. - Soojin Hwang; Daehyeon Baek; Jongse Park; Jaehyuk Huh 001 (ACM Trans. Archit. Code Optim., 2024)

Unified Memory Protection with Multi-granular MAC and Integrity Tree for Heterogeneous Processors. - Sunho Lee 003; Seonjin Na; Jeongwon Choi; Jinwon Pyo; Jaehyuk Huh 001 (ISCA, 2025)

Efficient LLM Inference with Activation Checkpointing and Hybrid Caching. - Sanghyeon Lee; Hongbeen Kim; Soojin Hwang; Guseul Heo; Minwoo Noh; Jaehyuk Huh 001 (CoRR, 2025)

ShieldCXL: A Practical Obliviousness Support with Sealed CXL Memory. - Kwanghoon Choi 003; Igjae Kim; Sunho Lee 002; Jaehyuk Huh 001 (ACM Trans. Archit. Code Optim., 2025)

Hardware-based Heterogeneous Memory Management for Large Language Model Inference. - Soojin Hwang; Jungwoo Kim 002; Sanghyeon Lee; Hongbeen Kim; Jaehyuk Huh 001 (CoRR, 2025)

Adaptive Migration Decision for Multi-Tenant Memory Systems. - Hyungjun Cho; Igjae Kim; Kwanghoon Choi 003; Hongjin Kim; Wonjae Lee; Junhyeok Im; Jinin So; Jaehyuk Huh 001 (CoRR, 2025)