A 3.2-12.8Gb/s Duty-Cycle Compensating Quadrature Error Corrector for DRAM Interfaces, With Fast Locking and Low Power Characteristics. - Hojun Yoon; Wonjoo Jung; Jaewoo Park 007; Jindo Byun; Hyungmin Jin; Hyunyoon Cho; Youngmin Kim; Baek-Jin Lim; Young-Chul Cho; Youngdon Choi; Jung-Hwan Choi; Hyungjong Ko; et al. (ESSCIRC, 2021)

A 4ns Settling Time FVF-Based Fast LDO Using Bandwidth Extension Techniques for HBM3. - Jinook Jung; Jun-Han Choi; Kyoung-Jun Roh; Jaewoo Park 007; Won-Mook Lim; Tae-Sung Kim; Han-Ki Jeong; Myoungbo Kwak; Jaeyoun Youn; Jeong-Don Ihm; Changsik Yoo; Youngdon Choi; et al. (A-SSCC, 2023)

A Comprehensive Study of Read-After-Write-Delay for Ferroelectric VNAND. - Ilho Myeong; Suhwan Lim; Taeyoung Kim; Sanghyun Park; Suseong Noh; Seung Min Lee; Jongho Woo; Hanseung Ko; Youngji Noh; Munkang Choi; Kiheun Lee; Sangwoo Han; et al. (IRPS, 2024)

A 4 ns Settling Time FVF-Based Fast LDO Using Bandwidth Extension Techniques for HBM3. - Jinook Jung; Jun-Han Choi; Kyoung-Jun Roh; Jaewoo Park 007; Won-Mook Lim; Tae-Sung Kim; Han-Ki Jeong; Myoungbo Kwak; Jaeyoun Youn; Jeong-Don Ihm; Changsik Yoo; Youngdon Choi; et al. (IEEE J. Solid State Circuits, 2024)

A 32-Gb/s Single-Ended PAM-4 Transceiver With Asymmetric Termination and Equalization Techniques for Next-Generation Memory Interfaces. - Hyuntae Kim; Yunseong Jo; Sanghun Lee; Eunsang Lee; Young Choi; Jaewoo Park 007; Myoungbo Kwak; Jung-Hwan Choi; Youngdon Choi; Jaeduk Han (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

22.4 A 32-to-50Gb/s/pin Single-Ended PAM-4 Transmitter with a ZQ-Based FFE and PAM-4 LSB DBI-DC Encoding. - Yunseong Jo; Hyuntae Kim; Young Choi; Jaewoo Park 007; Myoungbo Kwak; Jaeduk Han (ISSCC, 2025)