Performance analysis of a multiple vehicle tandem system with inter-vehicle buffers and blocking. - Matthew E. H. Petering; Jaeyoung Seo; Chulung Lee (Comput. Ind., 2007)

An Approximate Transfer Function Model of Two Serially Connected Heterogeneous Transmission Lines. - Jaeyoung Seo; Minsoo Choi 002; Sanquan Song; Jae-Yoon Sim; Hong-June Park; Byungsub Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A 7.8Gb/s/pin 1.96pJ/b compact single-ended TRX and CDR with phase-difference modulation for highly reflective memory interfaces. - Sooeun Lee; Jaeyoung Seo; Kyunghyun Lim; Jaehyun Ko 001; Jae-Yoon Sim; Hong-June Park; Byungsub Kim (ISSCC, 2018)

An Approximate Closed-Form Transfer Function Model for Multiconductor Transmission Lines. - Jaeyoung Seo; Minsoo Choi 002; Byungsub Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A 7.8 Gb/s/pin, 1.96 pJ/b Transceiver With Phase-Difference-Modulation Signaling for Highly Reflective Interconnects. - Sooeun Lee; Jaeyoung Seo; Kyunghyun Lim; Jahyun Koo 001; Jae-Yoon Sim; Hong-June Park; Byungsub Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2020)

A 7.8-Gb/s 2.9-pJ/b Single-Ended Receiver With 20-Tap DFE for Highly Reflective Channels. - Jaeyoung Seo; Jaehyun Ko 001; Kyunghyun Lim; Sooeun Lee; Jae-Yoon Sim; Hong-June Park; Byungsub Kim (IEEE Trans. Very Large Scale Integr. Syst., 2020)

A DFE-Enhanced Phase-Difference Modulation Signaling for Multi-Drop Memory Interfaces. - Sooeun Lee; Jaeyoung Seo; Changyoon Han; Jae-Yoon Sim; Hong-June Park; Byungsub Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A Cost-efficient FPGA-based Embedded System for Biosensor Platform. - Iksu Jang; Jaeyoung Seo; Changjae Moon; Byungsub Kim (ISOCC, 2022)

A 20 Gb/s/pin 1.18pJ/b 1149µm2Single-Ended Inverter-based 4-tap Addition-Only Feed-Forward Equalization Transmitter with Improved Robustness to Coefficient Errors in 28nm CMOS. - Changjae Moon; Jaeyoung Seo; Myungguk Lee; Iksu Jang; Byungsub Kim (ISSCC, 2022)

A 20-Gb/s/pin 0.0024-mm2 Single-Ended DECS TRX with CDR-less Self-Slicing/Auto-Deserialization to Improve Tolerance on Duty Cycle Error and RX Supply Noise for DCC/CDR-less Short-Reach Memory Interfaces. - Jaeyoung Seo; Sooeun Lee; Myungguk Lee; Changjae Moon; Byungsub Kim (ISSCC, 2022)

A Compact Single-Ended Inverter-Based Transceiver With Swing Improvement for Short-Reach Links. - Myungguk Lee; Puneet Kanwar Kaur; Jaeyoung Seo; Seungho Han; Byungsub Kim (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A 20-Gb/s/Pin Compact Single-Ended DCC-Less DECS Transceiver With CDR-Less RX Front-End for On-Chip Links. - Jaeyoung Seo; Sooeun Lee; Myungguk Lee; Changjae Moon; Byungsub Kim (IEEE J. Solid State Circuits, 2023)

A Single-Ended Inverter-Based Addition-Only Feed-Forward Equalization Transmitter. - Changjae Moon; Jaeyoung Seo; Myungguk Lee; Iksu Jang; Byungsub Kim (IEEE J. Solid State Circuits, 2024)