Minimization of Logic Functions Using Essential Signature Sets. - Patrick C. McGeer; Jagesh V. Sanghavi; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (VLSI Design, 1993)

ESPRESSO-SIGNATURE: a new exact minimizer for logic functions. - Patrick C. McGeer; Jagesh V. Sanghavi; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (IEEE Trans. Very Large Scale Integr. Syst., 1993)

A parallel iterative linear solver for solving irregular grid semiconductor device matrices. - Eric Tomacruz; Jagesh V. Sanghavi; Alberto L. Sangiovanni-Vincentelli (SC, 1994)

High Performance BDD Package By Exploiting Memory Hiercharchy. - Jagesh V. Sanghavi; Rajeev K. Ranjan 001; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (DAC, 1996)

Binary decision diagrams on network of workstation. - Rajeev K. Ranjan 001; Jagesh V. Sanghavi; Robert K. Brayton; Alberto L. Sangiovanni-Vincentelli (ICCD, 1996)

Estimation of Speed, Area, and Power of Parameterizable, Soft IP. - Jagesh V. Sanghavi; Albert Wang (DAC, 2001)