Giga-sample Data Acquisition Method for High-speed DDR5 SDRAM. - Seunggyu Lee; Jongho Yoon 001; Jakang Lee; Seokhyeong Kang (ISOCC, 2021)

Routability Prediction using Deep Hierarchical Classification and Regression. - Daeyeon Kim; Jakang Lee; Seokhyeong Kang (DATE, 2023)

Multi-Source Transfer Learning for Design Technology Co-Optimization. - Jakang Lee; Jaeseung Lee; Seonghyeon Park; Seokhyeong Kang (ISLPED, 2023)

Advanced Parasitic Capacitance Extraction using Active Learning. - Donggyu Kim; Jakang Lee; Seokhyeong Kang (ISOCC, 2023)

RL-Fill: Timing-Aware Fill Insertion using Reinforcement Learning. - Jinoh Cho; Seonghyeon Park; Jakang Lee; Sung-Yun Lee; Jinmo Ahn; Seokhyeong Kang (ICCAD, 2024)

TA3D: Timing-Aware 3D IC Partitioning and Placement by Optimizing the Critical Path. - Donggyu Kim; Minjae Kim; Junseok Hur; Jakang Lee; Jinoh Cho; Seokhyeong Kang (MLCAD, 2024)

LIBMixer: An all-MLP Architecture for Cell Library Characterization towards Design Space Optimization. - Jaeseung Lee; Sunggyu Jang; Jakang Lee; Seokhyeong Kang (ASP-DAC, 2025)

ParaFormer: A Hybrid Graph Neural Network and Transformer Approach for Pre-Routing Parasitic RC Prediction. - Jongho Yoon 001; Jakang Lee; Donggyu Kim; Junseok Hur; Seokhyeong Kang (ASP-DAC, 2025)