Characterizing Microarchitecture Soft Error Vulnerability Phase Behavior. - Xin Fu; James Poe; Tao Li 006; José A. B. Fortes (MASCOTS, 2006)

BASS: a benchmark suite for evaluating architectural security systems. - James Poe; Tao Li 006 (SIGARCH Comput. Archit. News, 2006)

Using Analytical Models to Efficiently Explore Hardware Transactional Memory and Multi-Core Co-Design. - James Poe; Chang-Burm Cho; Tao Li 006 (SBAC-PAD, 2008)

TransMetric: architecture independent workload characterization for transactional memory benchmarks. - James Poe; Clay Hughes; Tao Li 006 (ICS, 2009)

On the (dis)similarity of transactional memory workloads. - Clay Hughes; James Poe; Amer Qouneh; Tao Li 006 (IISWC, 2009)

Accurate, scalable and informative design space exploration for large and sophisticated multi-core oriented architectures. - Chang-Burm Cho; James Poe; Tao Li 006; Jingling Yuan (MASCOTS, 2009)

TransPlant: A parameterized methodology for generating transactional memory workloads. - James Poe; Clay Hughes; Tao Li 006 (MASCOTS, 2009)