Digital Leakage Compensation for a Low-Power and Low-Jitter 0.5-to-5GHz PLL in 10nm FinFET CMOS Technology. - Yongping Fan; Bo Xiang; Dan Zhang; James S. Ayers; Kuan-Yueh James Shen; Andrey Mezhiba (ISSCC, 2019)

A 0.5V-to-0.9V 0.2GHz-to-5GHz Ultra-Low-Power Digitally-Assisted Analog Ring PLL with Less Than 200ns Lock Time in 22nm FinFET CMOS Technology. - Bo Xiang; Yongping Fan; James S. Ayers; James Shen; Dan Zhang (CICC, 2020)

16 Arrays of 32 All-to-All Coupled CMOS Oscillators for AI Inference and Combinatorial Optimization. - Hai Li 008; James S. Ayers; Anni Lu; You Li 002; Dmitri E. Nikonov; Yongping Fan; Ian A. Young (CICC, 2025)

Compact PNP BJT-Based Temperature Sensor and Sub-1-V Bandgap Reference for SoC Applications in 4-nm FinFET. - You Li 002; David E. Duarte; James S. Ayers; Yongping Fan (IEEE J. Solid State Circuits, 2025)