A 4k capable FPGA based high throughput binary arithmetic decoder for H.265/MPEG-HEVC. - Jan Hahlbeck; Benno Stabernack (ICCE-Berlin, 2014)

FPGA implementation of a full HD real-time HEVC main profile decoder. - Denis Engelhardt; Jan Moller; Jan Hahlbeck; Benno Stabernack (IEEE Trans. Consumer Electron., 2014)

Demonstrating an FPGA implementation of a full HD real-time HEVC decoder with memory optimizations for range extensions support. - Benno Stabernack; Jan Moller; Jan Hahlbeck; Jens Brandenburg (DASIP, 2015)