HySim: a fast simulation framework for embedded software development. - Stefan Kraemer; Lei Gao; Jan Weinstock; Rainer Leupers; Gerd Ascheid; Heinrich Meyr (CODES+ISSS, 2007)

SCandal: SystemC Analysis for Nondeterminism Anomalies. - Jan Henrik Weinstock; Christoph Schumacher; Rainer Leupers; Gerd Ascheid (FDL (Selected Papers), 2012)

Cause and effect of nondeterministic behavior in sequential and parallel SystemC simulators. - Christoph Schumacher; Jan Henrik Weinstock; Rainer Leupers; Gerd Ascheid (HLDVT, 2012)

legaSCi: Legacy SystemC Model Integration into Parallel Systemc Simulators. - Christoph Schumacher; Jan Henrik Weinstock; Rainer Leupers; Gerd Ascheid; Laura Tosoratto; Alessandro Lonardo; Dietmar Petras; Thorsten Grötker (IPDPS Workshops, 2013)

Time-decoupled parallel SystemC simulation. - Jan Henrik Weinstock; Christoph Schumacher; Rainer Leupers; Gerd Ascheid; Laura Tosoratto (DATE, 2014)

EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems. - Lars Schor; Iuliana Bacivarov; Luis Gabriel Murillo; Pier Stanislao Paolucci; Frédéric Rousseau 001; Ashraf El Antably; Robert Buecs; Nicolas Fournel; Rainer Leupers; Devendra Rai; Lothar Thiele; Laura Tosoratto; et al. (ISPA, 2014)

legaSCi: Legacy SystemC Model Integration into Parallel Simulators. - Christoph Schumacher; Jan Henrik Weinstock; Rainer Leupers; Gerd Ascheid; Laura Tosoratto; Alessandro Lonardo; Dietmar Petras; Andreas Hoffmann 002 (ACM Trans. Embed. Comput. Syst., 2014)

Direct FPGA-based power profiling for a RISC processor. - Cosmin Cernazanu-Glavan; Marius Marcu; Alexandru Amaricai; Stefan Fedeac; Madalin Ghenea; Zheng Wang 027; Anupam Chattopadhyay; Jan Weinstock; Rainer Leupers (I2MTC, 2015)

Parallel SystemC simulation for ESL design using flexible time decoupling. - Jan Henrik Weinstock; Rainer Leupers; Gerd Ascheid (SAMOS, 2015)

Modeling Exclusive Memory Access for a Time-Decoupled Parallel SystemC Simulator. - Jan Henrik Weinstock; Rainer Leupers; Gerd Ascheid (SCOPES, 2015)

Low-Cost Hardware Infrastructure for Runtime Thread Level Energy Accounting. - Marius Marcu; Oana Boncalo; Madalin Ghenea; Alexandru Amaricai; Jan Weinstock; Rainer Leupers; Zheng Wang 027; Giorgis Georgakoudis; Dimitrios S. Nikolopoulos; Cosmin Cernazanu-Glavan; Lucian Bara; Marian Ionascu (ARCS, 2016)

SystemC-link: Parallel SystemC simulation using time-decoupled segments. - Jan Henrik Weinstock; Rainer Leupers; Gerd Ascheid; Dietmar Petras; Andreas Hoffmann 002 (DATE, 2016)

Parallel SystemC Simulation for ESL Design. - Jan Henrik Weinstock; Luis Gabriel Murillo; Rainer Leupers; Gerd Ascheid (ACM Trans. Embed. Comput. Syst., 2016)

Accelerating MPSoC Simulation Using Parallel SystemC and Processor Sleep Models. - Jan Henrik Weinstock; Rainer Leupers; Gerd Ascheid (RAPIDO, 2017)

AMVP - a high performance virtual platform using parallel systemC for multicore ARM architectures: work-in-progress. - Jan Henrik Weinstock; Robert Lajos Bücs; Florian Walbroel; Rainer Leupers; Gerd Ascheid (CODES+ISSS, 2018)

A Multi-domain Co-simulation Ecosystem for Fully Virtual Rapid ADAS Prototyping. - Robert Lajos Bücs; Pramod Lakshman; Jan Henrik Weinstock; Florian Walbroel; Rainer Leupers; Gerd Ascheid (SMARTGREENS/VEHITS (Selected Papers), 2018)

Fully Virtual Rapid ADAS Prototyping via a Joined Multi-domain Co-simulation Ecosystem. - Robert Lajos Bücs; Pramod Lakshman; Jan Henrik Weinstock; Florian Walbroel; Rainer Leupers; Gerd Ascheid (VEHITS, 2018)

Fast SystemC Processor Models with Unicorn. - Lukas Jünger 001; Jan Henrik Weinstock; Rainer Leupers; Gerd Ascheid (RAPIDO, 2019)

Work-in-Progress: A Generic Non-Intrusive Parallelization Approach for SystemC TlM-2.0-Based Virtual Platforms. - Nils Bosbach; Rebecca Pelke; Niko Zurstraßen; Lukas Jünger 001; Jan Henrik Weinstock; Rainer Leupers (CODES+ISSS, 2023)

Efficient RISC-V-on-x64 Floating Point Simulation. - Niko Zurstraßen; Nils Bosbach; Jan Moritz Joseph; Lukas Jünger 001; Jan Henrik Weinstock; Rainer Leupers (ICCD, 2023)

Towards High-Performance Virtual Platforms: A Parallelization Strategy for SystemC TLM-2.0 CPU Models. - Nils Bosbach; Niko Zurstraßen; Rebecca Pelke; Lukas Jünger 001; Jan Henrik Weinstock; Rainer Leupers (DAC, 2024)

High-Performance ARM-on-ARM Virtualization for Multicore SystemC-TLM-Based Virtual Platforms. - Nils Bosbach; Rebecca Pelke; Niko Zurstraßen; Jan Henrik Weinstock; Lukas Jünger 001; Rainer Leupers (DATE, 2025)

Bridging the Gap: Physical PCI Device Integration Into SystemC-TLM Virtual Platforms. - Nils Bosbach; Rebecca Pelke; Niko Zurstraßen; Jan Henrik Weinstock; Lukas Jünger 001; Rainer Leupers (CoRR, 2025)

Scalable Software Testing in Fast Virtual Platforms: Leveraging SystemC, QEMU and Containerization. - Lukas Jünger 001; Jan Henrik Weinstock; Tim Kraus (CoRR, 2025)