HEAT: Hierarchical Energy Analysis Tool. - Janardhan H. Satyanarayana; Keshab K. Parhi (DAC, 1996)

A hierarchical approach to transistor-level power estimation of arithmetic units. - Janardhan H. Satyanarayana; Keshab K. Parhi (ICASSP, 1996)

Systematic analysis of bounds on power consumption in pipelined and non-pipelined multipliers. - Janardhan H. Satyanarayana; Keshab K. Parhi; Leilei Song; Yun-Nan Chang (ICCD, 1996)

Design and FPGA Implementation of Digit-Serial Modified Booth Multipliers. - Janardhan H. Satyanarayana; Behrouz Nowrouzian (J. Circuits Syst. Comput., 1996)

Design and Implementation of Low-Power Digit-Serial Multipliers. - Yun-Nan Chang; Janardhan H. Satyanarayana; Keshab K. Parhi (ICCD, 1997)

A New Technique for the High-Level Synthesis of Digit-Serial Digital Filters Based on Genetic Algorithms. - Janardhan H. Satyanarayana; Behrouz Nowrouzian (J. Circuits Syst. Comput., 1997)

Power Estimation of Digital Data Paths Using HEAT. - Janardhan H. Satyanarayana; Keshab K. Parhi (IEEE Des. Test Comput., 2000)

Theoretical analysis of word-level switching activity in the presence of glitching and correlation. - Janardhan H. Satyanarayana; Keshab K. Parhi (IEEE Trans. Very Large Scale Integr. Syst., 2000)