A multiplier-free fixed-task digital CNN array for video segmentation system. - Ari Paasio; Jani Paakkulainen; Jouni Isoaho (ISCAS, 2000)

Capturing Processor Architectures from Protocol Processing Applications: a Case Study. - Seppo Virtanen; Jani Paakkulainen; Tero Nurmi (DSD, 2005)

Highly Automated FPGA Synthesis of Application-Specific Protocol Processors. - Seppo Virtanen; Dragos Truscan; Jani Paakkulainen; Jouni Isoaho; Johan Lilius (FPL, 2005)

Tuning a Protocol Processor Architecture Towards DSP Operations. - Jani Paakkulainen; Seppo Virtanen; Jouni Isoaho (SAMOS, 2005)

A system-level framework for designing and evaluating protocol processor architectures. - Seppo Virtanen; Tero Nurmi; Jani Paakkulainen; Johan Lilius (Int. J. Embed. Syst., 2005)

MVTsim: software simulator for multicore on chip parallel computer architectures. - Jari-Matti Mäkelä; Jani Paakkulainen; Ville Leppänen (CompSysTech, 2009)

Outline of RISC-based core for multiprocessor on chip architecture supporting moving threads. - Jani Paakkulainen; Jari-Matti Mäkelä; Ville Leppänen; Martti Forsell (CompSysTech, 2009)