FPGA-based image processing for omnidirectional vision on mobile robots. - Jones Yudi Mori; Daniel M. Muñoz Arboleda; Janier Arias-Garcia; Carlos Humberto Llanos Quintero; Jose M. Motta (SBCCI, 2011)

Hardware implementation of GMDH-type artificial neural networks and its use to predict approximate three-dimensional structures of proteins. - André L. S. Braga; Janier Arias-Garcia; Carlos H. Llanos; Márcio Dorn; Alfredo Foltran; Leandro dos Santos Coelho (ReCoSoC, 2012)

An FPGA-Based Omnidirectional Vision Sensor for Motion Detection on Mobile Robots. - Jones Yudi Mori; Janier Arias-Garcia; Camilo Sánchez-Ferreira; Daniel M. Muñoz; Carlos H. Llanos; José Maurício S. T. Motta (Int. J. Reconfigurable Comput., 2012)

Verification of Hardware Implementations through Correctness of their Recursive Definitions in PVS. - Ariane Alves Almeida; Carlos H. Llanos; Janier Arias-Garcia; Mauricio Ayala-Rincón (SBCCI, 2014)

Implementação em hardware reconfigurável de operadores matriciais para solução numérica de sistemas lineares. - Janier Arias-Garcia (2014)

Efficient hardware implementation of the Richardson-Lucy Algorithm for restoring motion-blurred image on reconfigurable digital system. - Oscar Anacona-Mosquera; Janier Arias-Garcia; Daniel M. Muñoz Arboleda; Carlos H. Llanos (SBCCI, 2016)

Image Encryption Algorithm Using Natural Interval Extensions. - Lucas Giovanni Nardo; Arthur Mendes Lima; Erivelton Geraldo Nepomuceno; Janier Arias-Garcia (CoRR, 2018)

Simplification of the digital representation of the tent map through biased fixed point. - Mariana Teixeira; Nayara Pinto Basílio; Davidson Lafitte Firmo; Erivelton G. Nepomuceno; Janier Arias-Garcia (CoRR, 2019)

A New PRNG Hardware Architecture Based on an Exponential Chaotic Map. - Matheus B. R. Cardoso; Samuel S. da Silva; Lucas Giovanni Nardo; Roberto M. Passos; Erivelton G. Nepomuceno; Janier Arias-Garcia (ISCAS, 2021)

A New Automated Energy Meter Fraud Detection System Based on Artificial Intelligence. - João Pedro Klock; Jhonatan Corrêa; Miguel A. Bessa; Janier Arias-Garcia; Felipe Barboza; Carmo Meinertz (SBESC, 2021)

A new floating-point adder FPGA-based implementation using RN-coding of numbers. - Túlio Araujo; Matheus B. R. Cardoso; Erivelton G. Nepomuceno; Carlos H. Llanos; Janier Arias-Garcia (Comput. Electr. Eng., 2021)

A Manycore Vision Processor for Real-Time Smart Cameras. - Bruno Almeida da Silva; Arthur Mendes Lima; Janier Arias-Garcia; Michael Hübner 001; Jones Yudi Mori (Sensors, 2021)

Enhancing Performance of Gabriel Graph-Based Classifiers by a Hardware Co-Processor for Embedded System Applications. - Janier Arias-Garcia; Augusto Mafra; Liliane Gade; Frederico Coelho; Cristiano Leite Castro; Luiz C. B. Torres; Antônio de Pádua Braga (IEEE Trans. Ind. Informatics, 2021)

Design of an Advanced System-on-Chip Architecture for Chaotic Image Encryption. - Arthur Mendes Lima; Lucas Giovanni Nardo; Erivelton Geraldo Nepomuceno; Janier Arias-Garcia; Jones Yudi Mori (SBCCI, 2023)

A New Chaos-Based PRNG Hardware Architecture Using the HUB Fixed-Point Format. - Samuel S. da Silva; Matheus B. R. Cardoso; Lucas Giovanni Nardo; Erivelton Geraldo Nepomuceno; Michael Hübner 001; Janier Arias-Garcia (IEEE Trans. Instrum. Meas., 2023)

Improved Design for Hardware Implementation of Graph-Based Large Margin Classifiers for Embedded Edge Computing. - Janier Arias-Garcia; Alan Cândido de Souza; Liliane Gade; Jones Yudi Mori; Frederico Coelho; Cristiano Leite Castro; Luiz C. B. Torres; Antônio P. Braga (IEEE Trans. Neural Networks Learn. Syst., 2024)

Image Steganography Based on Chaotic Systems and Finite-Precision Error. - Matheus Carvalho; Renan Neves Da Silva; Samuel Souza Da Silva; Janier Arias-Garcia; Lucas Giovani Nardo (SBCCI, 2025)

Image encryption architecture exploiting finite-precision error for System-on-Chip and programmable logic devices. - Arthur Mendes Lima; Lucas Giovanni Nardo; Erivelton G. Nepomuceno; Janier Arias-Garcia; Jones Yudi Mori Alves da Silva (Comput. Electr. Eng., 2025)