The effects of mispredicted-path execution on branch prediction structures. - Stéphan Jourdan; Tse-Hao Hsing; Jared Stark; Yale N. Patt (IEEE PACT, 1996)

Reducing the Performance Impact of Instruction Cache Misses by Writing Instructions into the Reservation Stations Out-of-Order. - Jared Stark; Paul Racunas; Yale N. Patt (MICRO, 1997)

One Billion Transistors, One Uniprocessor, One Chip. - Yale N. Patt; Sanjay J. Patel; Marius Evers; Daniel H. Friendly; Jared Stark (Computer, 1997)

Recovery requirements of branch prediction storage structures in the presence of mispredicted-path execution. - Stéphan Jourdan; Jared Stark; Tse-Hao Hsing; Yale N. Patt (Int. J. Parallel Program., 1997)

Variable Length Path Branch Prediction. - Jared Stark; Marius Evers; Yale N. Patt (ASPLOS, 1998)

Simultaneous Subordinate Microthreading (SSMT). - Robert S. Chappell; Jared Stark; Sangwook P. Kim; Steven K. Reinhardt; Yale N. Patt (ISCA, 1999)

On pipelining dynamic instruction scheduling logic. - Jared Stark; Mary D. Brown; Yale N. Patt (MICRO, 2000)

Out-of-order fetch, decode, and issue. - Jared Stark (2000)

Select-free instruction scheduling logic. - Mary D. Brown; Jared Stark; Yale N. Patt (MICRO, 2001)

Bloom filtering cache misses for accurate data speculation and prefetching. - Jih-Kwon Peir; Shih-Chang Lai; Shih-Lien Lu; Jared Stark; Konrad Lai (ICS, 2002)

Runahead Execution: An Alternative to Very Large Instruction Windows for Out-of-Order Processors. - Onur Mutlu; Jared Stark; Chris Wilkerson; Yale N. Patt (HPCA, 2003)

Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History. - Renju Thomas; Manoj Franklin; Chris Wilkerson; Jared Stark (ISCA, 2003)

Runahead Execution: An Effective Alternative to Large Instruction Windows. - Onur Mutlu; Jared Stark; Chris Wilkerson; Yale N. Patt (IEEE Micro, 2003)

Prophet/Critic Hybrid Branch Prediction. - Ayose Falcón; Jared Stark; Alex Ramírez; Konrad Lai; Mateo Valero (ISCA, 2004)

Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution. - Hyesoon Kim; Onur Mutlu; Jared Stark; Yale N. Patt (MICRO, 2005)

On Reusing the Results of Pre-Executed Instructions in a Runahead Execution Processor. - Onur Mutlu; Hyesoon Kim; Jared Stark; Yale N. Patt (IEEE Comput. Archit. Lett., 2005)

Guest Editors Introduction. - Chris Wilkerson; Jared Stark (J. Instr. Level Parallelism, 2005)

Better Branch Prediction Through Prophet/Critic Hybrids. - Ayose Falcón; Jared Stark; Alex Ramírez; Konrad K. Lai; Mateo Valero (IEEE Micro, 2005)

Wish Branches: Enabling Adaptive and Aggressive Predicated Execution. - Hyesoon Kim; Onur Mutlu; Yale N. Patt; Jared Stark (IEEE Micro, 2006)

Author retrospective for bloom filtering cache misses for accurate data speculation and prefetching. - Jih-Kwon Peir; Shih-Chang Kevin Lai; Shih-Lien Lu; Jared Stark; Konrad Lai (ICS 25th Anniversary, 2014)

Towards the adoption of Local Branch Predictors in Modern Out-of-Order Superscalar Processors. - Niranjan Soundararajan; Saurabh Gupta; Ragavendra Natarajan; Jared Stark; Rahul Pal; Franck Sala; Lihu Rappoport; Adi Yoaz; Sreenivas Subramoney (MICRO, 2019)

EMISSARY: Enhanced Miss Awareness Replacement Policy for L2 Instruction Caching. - Nayana Prasad Nagendra; Bhargav Reddy Godala; Ishita Chaturvedi; Atmn Patel; Svilen Kanev; Tipp Moseley; Jared Stark; Gilles A. Pokam; Simone Campanoni; David I. August (ISCA, 2023)

PDIP: Priority Directed Instruction Prefetching. - Bhargav Reddy Godala; Sankara Prasad Ramesh; Gilles A. Pokam; Jared Stark; André Seznec; Dean M. Tullsen; David I. August (ASPLOS (2), 2024)