Reliable Railway Station System Based on Regular Structure Implemented in FPGA. - Jaroslav Borecký; Pavel Kubalík; Hana Kubátová (DSD, 2009)

Faults Coverage Improvement Based on Fault Simulation and Partial Duplication. - Jaroslav Borecký; Martin Kohlík; Hana Kubátová; Pavel Kubalík (DSD, 2010)

Fault Models Usability Study for On-line Tested FPGA. - Jaroslav Borecký; Martin Kohlík; Pavel Kubalík; Hana Kubátová (DSD, 2011)

Miscellaneous Types of Partial Duplication Modifications for Availability Improvements. - Martin Kohlík; Jaroslav Borecký; Hana Kubátová (DSD, 2012)

Fault Tolerant Duplex System with High Availability for Practical Applications. - Pavel Vit; Jaroslav Borecký; Martin Kohlík; Hana Kubátová (DSD, 2014)

Parity Waterfall method. - Jaroslav Borecký; Martin Kohlík; Hana Kubátová (DDECS, 2016)

Enhanced Duplication Method with TMR-Like Masking Abilities. - Jaroslav Borecký; Martin Kohlík; Pavel Vit; Hana Kubátová (DSD, 2016)

Parity driven reconfigurable duplex system. - Jaroslav Borecký; Martin Kohlík; Hana Kubátová (Microprocess. Microsystems, 2017)

Evaluation of the SEU Faults Coverage of a Simple Fault Model for Application-Oriented FPGA Testing. - Jaroslav Borecký; Robert Hülle; Petr Fiser (DSD, 2020)

Evaluation of the Medium-sized Neural Network using Approximative Computations on Zynq FPGA. - Miroslav Skrbek; Pavel Kubalík; Martin Kohlík; Jaroslav Borecký; Robert Hülle (MECO, 2023)

Quantized Neural Network with Linearly Approximated Functions on Zynq FPGA. - Miroslav Skrbek; Pavel Kubalík; Martin Kohlík; Jaroslav Borecký; Robert Hülle (MECO, 2024)