A dual-mode 700-Msamples/s 6-bit 200-Msamples/s 7-bit A/D converter in a 0.25-μm digital CMOS process. - Krishnaswamy Nagaraj; David A. Martin; Mark A. Wolfe; Ranjan Chattopadhyay; Shanthi Pavan; Jason Cancio; T. R. Viswanathan 001 (IEEE J. Solid State Circuits, 2000)

A 40-43-Gb/s clock and data recovery IC with integrated SFI-5 1: 16 demultiplexer in SiGe technology. - Adrian Ong; Saied Benyamin; Jason Cancio; Vincent Condito; Tad Labrie; Qinghung Lee; John Paul Mattia; Derek K. Shaeffer; Arvin Shahani; Xiaomin Si; Hai Tao; Maurice Tarsia; et al. (IEEE J. Solid State Circuits, 2003)