Incorporating IDDQ testing in BIST: improved coverage through test diversity. - Adit D. Singh; Jason P. Hurst (VTS, 1994)

Flip-flop sharing in standard scan path to enhance delay fault testing of sequential circuits. - Jason P. Hurst; Nick Kanopoulos (Asian Test Symposium, 1995)

A differential built-in current sensor design for high-speed IDDQ testing. - Jason P. Hurst; Adit D. Singh (IEEE J. Solid State Circuits, 1997)