A 1.5GHz third generation itanium® 2 processor. - Jason Stinson; Stefan Rusu (DAC, 2003)

A 1.5-GHz 130-nm Itanium® 2 Processor with 6-MB on-die L3 cache. - Stefan Rusu; Jason Stinson; Simon Tam 001; Justin Leung; Harry Muljono; Brian S. Cherkauer (IEEE J. Solid State Circuits, 2003)

A 65-nm Dual-Core Multithreaded Xeon® Processor With 16-MB L3 Cache. - Stefan Rusu; Simon M. Tam; Harry Muljono; David Ayers; Jonathan Chang; Brian S. Cherkauer; Jason Stinson; John Benoit; Raj Varada; Justin Leung; Rahul Dilip Limaye; Sujal Vora (IEEE J. Solid State Circuits, 2007)

Power reduction techniques for an 8-core xeon® processor. - Stefan Rusu; Simon M. Tam; Harry Muljono; Jason Stinson; David Ayers; Jonathan Chang; Raj Varada; Matt Ratta; Sailesh Kottapalli; Sujal Vora (ESSCIRC, 2009)

A 45nm 8-core enterprise Xeon® processor. - Stefan Rusu; Simon M. Tam; Harry Muljono; Jason Stinson; David Ayers; Jonathan Chang; Raj Varada; Matt Ratta; Sailesh Kottapalli (ISSCC, 2009)

A 45 nm 8-Core Enterprise Xeon¯ Processor. - Stefan Rusu; Simon M. Tam; Harry Muljono; Jason Stinson; David Ayers; Jonathan Chang; Raj Varada; Matt Ratta; Sailesh Kottapalli; Sujal Vora (IEEE J. Solid State Circuits, 2010)