2.1 28Gb/s 560mW multi-standard SerDes with single-stage analog front-end and 14-tap decision-feedback equalizer in 28nm CMOS. - Hiroshi Kimura; Pervez M. Aziz; Tai Jing; Ashutosh Sinha; Ram Narayan; Hairong Gao; Ping Jing; Gary Hom; Anshi Liang; Eric Zhang; Aniket Kadkol; Ruchi Kothari; et al. (ISSCC, 2014)

A 28 Gb/s 560 mW Multi-Standard SerDes With Single-Stage Analog Front-End and 14-Tap Decision Feedback Equalizer in 28 nm CMOS. - Hiroshi Kimura; Pervez M. Aziz; Tai Jing; Ashutosh Sinha; Shiva Prasad Kotagiri; Ram Narayan; Hairong Gao; Ping Jing; Gary Hom; Anshi Liang; Eric Zhang; Aniket Kadkol; et al. (IEEE J. Solid State Circuits, 2014)

BadSFL: Backdoor Attack against Scaffold Federated Learning. - Xingshuo Han; Xuanye Zhang; Xiang Lan; Haozhao Wang; Shengmin Xu; Shen Ren; Jason Zeng; Ming Wu; Michael Heinrich; Tianwei Zhang 004 (CoRR, 2024)

DiLoCoX: A Low-Communication Large-Scale Training Framework for Decentralized Cluster. - Ji Qi; WenPeng Zhu; Li Li; Ming Wu; YingJun Wu; Wu He; Xun Gao; Jason Zeng; Michael Heinrich (CoRR, 2025)