Neural Competitive Structures for Segmentation Based on Motion Features. - Javier Díaz 001; Sonia Mota; Eduardo Ros 001; Guillermo Botella Juan (IWANN (1), 2003)

Real Time Optical Flow Processing System. - Javier Díaz 001; Eduardo Ros 001; Sonia Mota; Richard R. Carrillo; Rodrigo Agís (FPL, 2004)

Real-Time Visual Motion Detection of Overtaking Cars for Driving Assistance Using FPGAs. - Sonia Mota; Eduardo Ros 001; Javier Díaz 001; Eva M. Ortigosa; Rodrigo Agís; Richard R. Carrillo (FPL, 2004)

High Performance Stereo Computation Architecture. - Javier Díaz 001; Eduardo Ros 001; Sonia Mota; Eva M. Ortigosa; Begoña del Pino (FPL, 2005)

Motion-Driven Segmentation by Competitive Neural Processing. - Sonia Mota; Eduardo Ros Vidal; Javier Díaz 001; Eva M. Ortigosa; Alberto Prieto (Neural Process. Lett., 2005)

Event-Driven Simulation Engine for Spiking Neural Networks on a Chip. - Rodrigo Agís; Javier Díaz 001; Eduardo Ros 001; Richard R. Carrillo; Eva M. Ortigosa (ARC, 2006)

Highly Paralellized Architecture for Image Motion Estimation. - Javier Díaz 001; Eduardo Ros Vidal; Sonia Mota; Rafael Rodríguez-Gómez (ARC, 2006)

General Purpose Real-Time Image Segmentation System. - Sonia Mota; Eduardo Ros Vidal; Javier Díaz 001; Francisco de Toro (ARC, 2006)

Towards an Optimal Implementation of MLP in FPGA. - Eva M. Ortigosa; Antonio Cañas; Rafael Rodríguez-Gómez; Javier Díaz 001; Sonia Mota (ARC, 2006)

Real Time Image Processing on a Portable Aid Device for Low Vision Patients. - Eduardo Ros Vidal; Javier Díaz 001; Sonia Mota; F. Vargas-Martín; Maria Dolores Peláez-Coca (ARC, 2006)

Bio-inspired Motion-Based Object Segmentation. - Sonia Mota; Eduardo Ros 001; Javier Díaz 001; Rodrigo Agís; Francisco de Toro (ICIAR (1), 2006)

Real-Time Embedded System for Rear-View Mirror Overtaking Car Monitoring. - Javier Díaz 001; Eduardo Ros 001; Sonia Mota; Rodrigo Agís (SAMOS, 2006)

Hardware description of multi-layer perceptrons with different abstraction levels. - Eva M. Ortigosa; Antonio Cañas; Eduardo Ros 001; Pilar Martínez Ortigosa; Sonia Mota; Javier Díaz 001 (Microprocess. Microsystems, 2006)

FPGA-based real-time optical-flow system. - Javier Díaz 001; Eduardo Ros 001; Francisco J. Pelayo; Eva M. Ortigosa; Sonia Mota (IEEE Trans. Circuits Syst. Video Technol., 2006)

Image Processing Architecture for Local Features Computation. - Javier Díaz 001; Eduardo Ros 001; Sonia Mota; Richard R. Carrillo (ARC, 2007)

A Space Variant Mapping Architecture for Reliable Car Segmentation. - Sonia Mota; Eduardo Ros 001; Javier Díaz 001; Rafael Rodríguez-Gómez; Richard R. Carrillo (ARC, 2007)

Real Time Architectures for Moving-Objects Tracking. - Matteo Tomasi; Javier Díaz 001; Eduardo Ros 001 (ARC, 2007)

Increasing Efficiency in Disparity Calculation. - Jarno Ralli; Francisco J. Pelayo; Javier Díaz 001 (BVAI, 2007)

Dealing with the Perspective Distortion to Detect Overtaking Cars for Driving Assistance. - Sonia Mota; Eduardo Ros 001; Javier Díaz 001; Rodrigo Agís; Rafael Rodríguez-Gómez; Richard R. Carrillo (IbPRIA (1), 2007)

Visual Processing Platform Based on Artificial Retinas. - Sara Granados; Eduardo Ros Vidal; Rafael Rodríguez-Gómez; Javier Díaz 001 (IWANN, 2007)

Compact (and accurate) early vision processing in the harmonic space. - Silvio P. Sabatini; Giulia Gastaldi; Fabio Solari; Karl Pauwels; Marc M. Van Hulle; Javier Díaz 001; Eduardo Ros 001; Nicolas Pugeault; Norbert Krüger (VISAPP (1), 2007)

A phase-based stereo vision system-on-a-chip. - Javier Díaz 001; Eduardo Ros 001; Silvio P. Sabatini; Fabio Solari; Sonia Mota (Biosyst., 2007)

Fine grain pipeline systems for real-time motion and stereo-vision computation. - Javier Díaz 001; Eduardo Ros 001; Alberto Prieto; Francisco J. Pelayo (Int. J. High Perform. Syst. Archit., 2007)

Real-time Architecture for Robust Motion Estimation under Varying Illumination Conditions. - Javier Díaz 001; Eduardo Ros 001; Rafael Rodríguez-Gómez; Begoña del Pino (J. Univers. Comput. Sci., 2007)

Real-Time System for High-Image Resolution Disparity Estimation. - Javier Díaz 001; Eduardo Ros 001; Richard R. Carrillo; Alberto Prieto (IEEE Trans. Image Process., 2007)

A Hybrid FPGA/Coarse Parallel Processing Architecture for Multi-modal Visual Feature Descriptors. - Lars Baunegaard With Jensen; Anders Kjær-Nielsen; Javier Díaz Alonso; Eduardo Ros 001; Norbert Krüger (ReConFig, 2008)

Superpipelined high-performance optical-flow computation architecture. - Javier Díaz 001; Eduardo Ros 001; Rodrigo Agís; José Luis Bernier (Comput. Vis. Image Underst., 2008)

Lane-Change Decision Aid System Based on Motion-Driven Vehicle Tracking. - Javier Díaz Alonso; Eduardo Ros Vidal; Alexander Rotter; Martin Mühlenberg (IEEE Trans. Veh. Technol., 2008)

Optimization Strategies for High-Performance Computing of Optical-Flow in General-Purpose Processors. - Mancia Anguita; Javier Díaz 001; Eduardo Ros 001; F. J. Fernandez-Baldomero (IEEE Trans. Circuits Syst. Video Technol., 2009)

Visual System Based on Artificial Retina for Motion Detection. - Francisco Barranco; Javier Díaz 001; Eduardo Ros 001; Begoña del Pino (IEEE Trans. Syst. Man Cybern. Part B, 2009)

A compact harmonic code for early vision based on anisotropic frequency channels. - Silvio P. Sabatini; Giulia Gastaldi; Fabio Solari; Karl Pauwels; Marc M. Van Hulle; Javier Díaz 001; Eduardo Ros 001; Nicolas Pugeault; Norbert Krüger (Comput. Vis. Image Underst., 2010)

Fine grain pipeline architecture for high performance phase-based optical flow computation. - Matteo Tomasi; Francisco Barranco; Mauricio Vanegas; Javier Díaz 001; Eduardo Ros Vidal (J. Syst. Archit., 2010)

Multi-port abstraction layer for FPGA intensive memory exploitation applications. - Mauricio Vanegas; Matteo Tomasi; Javier Díaz 001; Eduardo Ros Vidal (J. Syst. Archit., 2010)

A method for sparse disparity densification using voting mask propagation. - Jarno Ralli; Javier Díaz 001; Eduardo Ros 001 (J. Vis. Commun. Image Represent., 2010)

Optical Flow in a Smart Sensor Based on Hybrid Analog-Digital Architecture. - Pablo Guzmán; Javier Díaz 001; Rodrigo Agís; Eduardo Ros 001 (Sensors, 2010)

High-Performance Optical-Flow Architecture Based on a Multi-Scale, Multi-Orientation Phase-Based Model. - Matteo Tomasi; Mauricio Vanegas; Francisco Barranco; Javier Díaz 001; Eduardo Ros 001 (IEEE Trans. Circuits Syst. Video Technol., 2010)

Hierarchical Optical Flow Estimation Architecture Using Color Cues. - Francisco Barranco; Matteo Tomasi; Javier Díaz 001; Eduardo Ros 001 (ARC, 2011)

On-Chip Ego-Motion Estimation Based on Optical Flow. - Mauricio Vanegas; Leonardo Rubio; Matteo Tomasi; Javier Díaz 001; Eduardo Ros 001 (ARC, 2011)

Optical Flow Reliability Model Approximated with RBF. - Rodrigo Agís; Javier Díaz 001; Pilar Martínez Ortigosa; Pablo Guzmán; Eduardo Ros 001 (IWANN (2), 2011)

Preface to the special issue on: Emerging Applications of Embedded Systems Research. - Jesús González 001; Miguel Damas; Javier Díaz 001; Pedro A. Castillo (J. Syst. Archit., 2011)

Bottom-up visual attention model based on FPGA. - Francisco Barranco; Javier Díaz 001; Begoña del Pino; Eduardo Ros 001 (ICECS, 2012)

Experimental Study of Image Representation Spaces in Variational Disparity Calculation. - Jarno Ralli; Javier Díaz 001; Pablo Guzmán; Eduardo Ros 001 (EURASIP J. Adv. Signal Process., 2012)

A multi-resolution approach for massively-parallel hardware-friendly optical flow estimation. - Francisco Barranco; Javier Díaz 001; Begoña del Pino; Eduardo Ros 001 (J. Vis. Commun. Image Represent., 2012)

Disparity disambiguation by fusion of signal- and symbolic-level information. - Jarno Ralli; Javier Díaz 001; Sinan Kalkan; Norbert Krüger; Eduardo Ros 001 (Mach. Vis. Appl., 2012)

Vector Disparity Sensor with Vergence Control for Active Vision Systems. - Francisco Barranco; Javier Díaz 001; Agostino Gibaldi; Silvio P. Sabatini; Eduardo Ros 001 (Sensors, 2012)

FPGA Implementation for Real-Time Background Subtraction Based on Horprasert Model. - Rafael Rodríguez-Gómez; Enrique J. Fernandez-Sanchez; Javier Díaz 001; Eduardo Ros 001 (Sensors, 2012)

A Comparison of FPGA and GPU for Real-Time Phase-Based Optical Flow, Stereo, and Local Image Features. - Karl Pauwels; Matteo Tomasi; Javier Díaz Alonso; Eduardo Ros 001; Marc M. Van Hulle (IEEE Trans. Computers, 2012)

Massive Parallel-Hardware Architecture for Multiscale Stereo, Optical Flow and Image-Structure Computation. - Matteo Tomasi; Mauricio Vanegas; Francisco Barranco; Javier Díaz 001; Eduardo Ros 001 (IEEE Trans. Circuits Syst. Video Technol., 2012)

Parallel Architecture for Hierarchical Optical Flow Estimation Based on FPGA. - Francisco Barranco; Matteo Tomasi; Javier Díaz 001; Mauricio Vanegas; Eduardo Ros 001 (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Real-Time Architecture for a Robust Multi-Scale Stereo Engine on FPGA. - Matteo Tomasi; Mauricio Vanegas; Francisco Barranco; Javier Díaz 001; Eduardo Ros 001 (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Real-Time Model-Based Rigid Object Pose Estimation and Tracking Combining Dense and Sparse Visual Cues. - Karl Pauwels; Leonardo Rubio; Javier Díaz 001; Eduardo Ros 001 (CVPR, 2013)

Interactive Techniques for Entertainment Applications Using Mobile Devices. - José Luis Gutiérrez Rivas; Pedro Cano Olivares; Javier Díaz Alonso (IWANN (2), 2013)

Pipelined architecture for real-time cost-optimized extraction of visual primitives based on FPGAs. - Francisco Barranco; Matteo Tomasi; Javier Díaz 001; Mauricio Vanegas; Eduardo Ros 001 (Digit. Signal Process., 2013)

Spatial and temporal constraints in variational correspondence methods. - Jarno Ralli; Javier Díaz 001; Eduardo Ros 001 (Mach. Vis. Appl., 2013)

Background Subtraction Based on Color and Depth Using Active Sensors. - Enrique J. Fernandez-Sanchez; Javier Díaz 001; Eduardo Ros 001 (Sensors, 2013)

On-chip semidense representation map for dense visual features driven by attention processes. - Sara Granados; Francisco Barranco; Sonia Mota; Javier Díaz 001; Eduardo Ros 001 (J. Real Time Image Process., 2014)

Background subtraction model based on color and depth cues. - Enrique J. Fernandez-Sanchez; Leonardo Rubio; Javier Díaz 001; Eduardo Ros 001 (Mach. Vis. Appl., 2014)

Low-cost sensor to detect overtaking based on optical flow. - Pablo Guzmán; Javier Díaz 001; Jarno Ralli; Rodrigo Agís; Eduardo Ros 001 (Mach. Vis. Appl., 2014)

Real-Time Visual Saliency Architecture for FPGA With Top-Down Attention Modulation. - Francisco Barranco; Javier Díaz 001; Begoña del Pino; Eduardo Ros 001 (IEEE Trans. Ind. Informatics, 2014)

Hierarchical architecture for motion and depth estimations based on color cues. - Francisco Barranco; Matteo Tomasi; Mauricio Vanegas; Javier Díaz 001; Sara Granados; Eduardo Ros Vidal (J. Real Time Image Process., 2015)

Codebook hardware implementation on FPGA for background subtraction. - Rafael Rodríguez-Gómez; Enrique J. Fernandez-Sanchez; Javier Díaz 001; Eduardo Ros Vidal (J. Real Time Image Process., 2015)

Safe Motor Controller in a Mixed-Critical Environment with Runtime Updating Capabilities. - José Luis Gutiérrez Rivas; Simon Holmbacka; Miguel Míndez-Macías; Wictor Lund; Sébastien Lafond; Johan Lilius; Javier Díaz Alonso (J. Univers. Comput. Sci., 2015)

CLONETS - clock network services: Strategy and innovation for clock services over optical-fibre networks. - Przemyslaw Krehlik; Lukasz Sliwczynski; Jirí Dostál; Jan Radil; Vladimír Smotlacha; Radek Velc; Josef Vojtech; Mauro Campanella; Davide Calonico; Cecilia Clivati; Filippo Levi; Ondrej Cíp; et al. (ICTON, 2017)

Sub-nanosecond Synchronization over 1G ethernet data links using white rabbit technologies on the WR-ZEN board. - Jorge Sanchez-Garrido; Antonio Miguel Lopez-Antequera; Miguel Jimenez-Lopez; Javier Díaz 001 (TSP, 2017)

Impact of network component temperature variation on long haul White Rabbit links. - Jose Lopez-Jimenez; Javier Díaz 001; Manuel Rodriguez-Alvarez (ISPCS, 2018)

A hardware assisted implementation of Time Varying Encryption System. - Fidel Rodriguez-Lopez; Francisco Girela-Lopez; Javier Díaz 001 (ISPCS, 2018)

Accurate Timing Networks for Dependable Smart Grid Applications. - Francisco Ramos 003; José Luis Gutiérrez Rivas; Jose Lopez-Jimenez; Benito Caracuel; Javier Díaz 001 (IEEE Trans. Ind. Informatics, 2018)

White Rabbit HSR: A Seamless Subnanosecond Redundant Timing System With Low-Latency Data Capabilities for the Smart Grid. - José Luis Gutiérrez Rivas; Jose Lopez-Jimenez; Eduardo Ros 001; Javier Díaz 001 (IEEE Trans. Ind. Informatics, 2018)

A Fully Programmable White-Rabbit Node for the SKA Telescope PPS Distribution System. - Miguel Jimenez-Lopez; Felipe Torres-Gonzalez; José Luis Gutiérrez Rivas; Manuel Rodriguez-Alvarez; Javier Díaz 001 (IEEE Trans. Instrum. Meas., 2019)

IEEE 1588 High Accuracy Default Profile: Applications and Challenges. - Francisco Girela-Lopez; Jose Lopez-Jimenez; Miguel Jimenez-Lopez; Rafael Rodríguez; Eduardo Ros 001; Javier Díaz 001 (IEEE Access, 2020)

10 Gigabit White Rabbit: Sub-Nanosecond Timing and Data Distribution. - Miguel Jimenez-Lopez; Francisco Girela-Lopez; Jose Lopez-Jimenez; Emilio Marin-Lopez; Rafael Rodríguez; Javier Díaz 001 (IEEE Access, 2020)

Digital Electrical Substation Communications Based on Deterministic Time-Sensitive Networking Over Ethernet. - Jorge Sanchez-Garrido; Antonio Jurado; Luis Medina 004; Rafael Rodríguez; Eduardo Ros 001; Javier Díaz 001 (IEEE Access, 2020)

Time as a Service Based on White Rabbit for Finance Applications. - Jose Lopez-Jimenez; José Luis Gutiérrez Rivas; Emilio Marin-Lopez; Manuel Rodriguez-Alvarez; Javier Díaz 001 (IEEE Commun. Mag., 2020)

Precise Network Time Monitoring: Picosecond-Level Packet Timestamping for Fintech Networks. - Francisco Girela-Lopez; Eduardo Ros 001; Javier Díaz 001 (IEEE Access, 2021)

Implementation of a Time-Sensitive Networking (TSN) Ethernet Bus for Microlaunchers. - Jorge Sanchez-Garrido; Beatriz Aparicio; José Gabriel Ramírez; Rafael Rodríguez; Mariasole Melara; Lorenzo Cercós; Eduardo Ros 001; Javier Díaz 001 (IEEE Trans. Aerosp. Electron. Syst., 2021)

Enhancing White Rabbit Synchronization Stability and Scalability Using P2P Transparent and Hybrid Clocks. - José Luis Gutiérrez Rivas; Felipe Torres-Gonzalez; Eduardo Ros 001; Javier Díaz 001 (IEEE Trans. Ind. Informatics, 2021)

A White Rabbit-Synchronized Accurate Time-Stamping Solution for the Small-Sized Cameras of the Cherenkov Telescope Array. - Jorge Sanchez-Garrido; Antonio Jurado; Miguel Jimenez-Lopez; Arnim Balzer; Heike Prokoph; Maurice Stephan; David Berge; Manuel Rodríguez-Álvarez; Javier Díaz 001 (IEEE Trans. Instrum. Meas., 2021)

Using Machine Learning for Predicting the Effect of Mutations in the Initiation Codon. - Javier Díaz Alonso; Francisco Abad Navarro; María Eugenia de la Morena-Barrio; Javier Corral; Jesualdo Tomás Fernández-Breis (IEEE J. Biomed. Health Informatics, 2022)

Ethernet-based timing system for accelerator facilities: The IFMIF-DONES case. - Carlos Megías; Víctor Vázquez; Eduardo Ros 001; Mauro Cappelli; Javier Díaz 001 (Comput. Networks, 2023)

Time Transfer and Clock Synchronization Analysis over Spine-Leaf Networks. - Alberto Ortega; Víctor Vázquez; Carlos Megías; Jesús González 001; Manuel Rodríguez-Álvarez; Javier Díaz 001; Eduardo Ros 001 (ISPCS, 2024)

Open Science and Artificial Intelligence for supporting the sustainability of the SRC Network: The espSRC case. - Julián Garrido; Susana Sánchez-Expósito; Antonio Ruiz Falcó; J. Ruedas; Maria Ángeles Mendoza; Víctor Vázquez; Manuel Parra; J. Sánchez; I. Labadie; Laura Darriba; Javier Moldón; M. Rodriguez-Álvarez; et al. (CoRR, 2025)