Javier Díaz

Orcid: 0000-0002-1849-8068

Affiliations:
  • University of Granada, Computer and Technology Department, Spain (PhD 2006)


According to our database1, Javier Díaz authored at least 79 papers between 2003 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

Online presence:

On csauthors.net:

Bibliography

2023
Ethernet-based timing system for accelerator facilities: The IFMIF-DONES case.
Comput. Networks, September, 2023

2022
Using Machine Learning for Predicting the Effect of Mutations in the Initiation Codon.
IEEE J. Biomed. Health Informatics, 2022

2021
A White Rabbit-Synchronized Accurate Time-Stamping Solution for the Small-Sized Cameras of the Cherenkov Telescope Array.
IEEE Trans. Instrum. Meas., 2021

Enhancing White Rabbit Synchronization Stability and Scalability Using P2P Transparent and Hybrid Clocks.
IEEE Trans. Ind. Informatics, 2021

Implementation of a Time-Sensitive Networking (TSN) Ethernet Bus for Microlaunchers.
IEEE Trans. Aerosp. Electron. Syst., 2021

Precise Network Time Monitoring: Picosecond-Level Packet Timestamping for Fintech Networks.
IEEE Access, 2021

2020
Time as a Service Based on White Rabbit for Finance Applications.
IEEE Commun. Mag., 2020

Digital Electrical Substation Communications Based on Deterministic Time-Sensitive Networking Over Ethernet.
IEEE Access, 2020

10 Gigabit White Rabbit: Sub-Nanosecond Timing and Data Distribution.
IEEE Access, 2020

IEEE 1588 High Accuracy Default Profile: Applications and Challenges.
IEEE Access, 2020

2019
A Fully Programmable White-Rabbit Node for the SKA Telescope PPS Distribution System.
IEEE Trans. Instrum. Meas., 2019

2018
White Rabbit HSR: A Seamless Subnanosecond Redundant Timing System With Low-Latency Data Capabilities for the Smart Grid.
IEEE Trans. Ind. Informatics, 2018

Accurate Timing Networks for Dependable Smart Grid Applications.
IEEE Trans. Ind. Informatics, 2018

A hardware assisted implementation of Time Varying Encryption System.
Proceedings of the IEEE International Symposium on Precision Clock Synchronization for Measurement, 2018

Impact of network component temperature variation on long haul White Rabbit links.
Proceedings of the IEEE International Symposium on Precision Clock Synchronization for Measurement, 2018

2017
Sub-nanosecond Synchronization over 1G ethernet data links using white rabbit technologies on the WR-ZEN board.
Proceedings of the 40th International Conference on Telecommunications and Signal Processing, 2017


2015
Safe Motor Controller in a Mixed-Critical Environment with Runtime Updating Capabilities.
J. Univers. Comput. Sci., 2015

Codebook hardware implementation on FPGA for background subtraction.
J. Real Time Image Process., 2015

Hierarchical architecture for motion and depth estimations based on color cues.
J. Real Time Image Process., 2015

2014
Real-Time Visual Saliency Architecture for FPGA With Top-Down Attention Modulation.
IEEE Trans. Ind. Informatics, 2014

Low-cost sensor to detect overtaking based on optical flow.
Mach. Vis. Appl., 2014

Background subtraction model based on color and depth cues.
Mach. Vis. Appl., 2014

On-chip semidense representation map for dense visual features driven by attention processes.
J. Real Time Image Process., 2014

2013
Background Subtraction Based on Color and Depth Using Active Sensors.
Sensors, 2013

Spatial and temporal constraints in variational correspondence methods.
Mach. Vis. Appl., 2013

Pipelined architecture for real-time cost-optimized extraction of visual primitives based on FPGAs.
Digit. Signal Process., 2013

Interactive Techniques for Entertainment Applications Using Mobile Devices.
Proceedings of the Advances in Computational Intelligence, 2013

Real-Time Model-Based Rigid Object Pose Estimation and Tracking Combining Dense and Sparse Visual Cues.
Proceedings of the 2013 IEEE Conference on Computer Vision and Pattern Recognition, 2013

2012
Real-Time Architecture for a Robust Multi-Scale Stereo Engine on FPGA.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Parallel Architecture for Hierarchical Optical Flow Estimation Based on FPGA.
IEEE Trans. Very Large Scale Integr. Syst., 2012

Massive Parallel-Hardware Architecture for Multiscale Stereo, Optical Flow and Image-Structure Computation.
IEEE Trans. Circuits Syst. Video Technol., 2012

A Comparison of FPGA and GPU for Real-Time Phase-Based Optical Flow, Stereo, and Local Image Features.
IEEE Trans. Computers, 2012

FPGA Implementation for Real-Time Background Subtraction Based on Horprasert Model.
Sensors, 2012

Vector Disparity Sensor with Vergence Control for Active Vision Systems.
Sensors, 2012

Disparity disambiguation by fusion of signal- and symbolic-level information.
Mach. Vis. Appl., 2012

A multi-resolution approach for massively-parallel hardware-friendly optical flow estimation.
J. Vis. Commun. Image Represent., 2012

Experimental Study of Image Representation Spaces in Variational Disparity Calculation.
EURASIP J. Adv. Signal Process., 2012

Bottom-up visual attention model based on FPGA.
Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011
Preface to the special issue on: Emerging Applications of Embedded Systems Research.
J. Syst. Archit., 2011

Optical Flow Reliability Model Approximated with RBF.
Proceedings of the Advances in Computational Intelligence, 2011

On-Chip Ego-Motion Estimation Based on Optical Flow.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

Hierarchical Optical Flow Estimation Architecture Using Color Cues.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

2010
High-Performance Optical-Flow Architecture Based on a Multi-Scale, Multi-Orientation Phase-Based Model.
IEEE Trans. Circuits Syst. Video Technol., 2010

Optical Flow in a Smart Sensor Based on Hybrid Analog-Digital Architecture.
Sensors, 2010

A method for sparse disparity densification using voting mask propagation.
J. Vis. Commun. Image Represent., 2010

Multi-port abstraction layer for FPGA intensive memory exploitation applications.
J. Syst. Archit., 2010

Fine grain pipeline architecture for high performance phase-based optical flow computation.
J. Syst. Archit., 2010

A compact harmonic code for early vision based on anisotropic frequency channels.
Comput. Vis. Image Underst., 2010

2009
Visual System Based on Artificial Retina for Motion Detection.
IEEE Trans. Syst. Man Cybern. Part B, 2009

Optimization Strategies for High-Performance Computing of Optical-Flow in General-Purpose Processors.
IEEE Trans. Circuits Syst. Video Technol., 2009

2008
Lane-Change Decision Aid System Based on Motion-Driven Vehicle Tracking.
IEEE Trans. Veh. Technol., 2008

Superpipelined high-performance optical-flow computation architecture.
Comput. Vis. Image Underst., 2008

A Hybrid FPGA/Coarse Parallel Processing Architecture for Multi-modal Visual Feature Descriptors.
Proceedings of the ReConFig'08: 2008 International Conference on Reconfigurable Computing and FPGAs, 2008

2007
Real-Time System for High-Image Resolution Disparity Estimation.
IEEE Trans. Image Process., 2007

Real-time Architecture for Robust Motion Estimation under Varying Illumination Conditions.
J. Univers. Comput. Sci., 2007

Fine grain pipeline systems for real-time motion and stereo-vision computation.
Int. J. High Perform. Syst. Archit., 2007

A phase-based stereo vision system-on-a-chip.
Biosyst., 2007

Compact (and accurate) early vision processing in the harmonic space.
Proceedings of the VISAPP 2007: Proceedings of the Second International Conference on Computer Vision Theory and Applications, Barcelona, Spain, March 8-11, 2007, 2007

Visual Processing Platform Based on Artificial Retinas.
Proceedings of the Computational and Ambient Intelligence, 2007

Dealing with the Perspective Distortion to Detect Overtaking Cars for Driving Assistance.
Proceedings of the Pattern Recognition and Image Analysis, Third Iberian Conference, 2007

Increasing Efficiency in Disparity Calculation.
Proceedings of the Advances in Brain, 2007

Real Time Architectures for Moving-Objects Tracking.
Proceedings of the Reconfigurable Computing: Architectures, 2007

A Space Variant Mapping Architecture for Reliable Car Segmentation.
Proceedings of the Reconfigurable Computing: Architectures, 2007

Image Processing Architecture for Local Features Computation.
Proceedings of the Reconfigurable Computing: Architectures, 2007

2006
FPGA-based real-time optical-flow system.
IEEE Trans. Circuits Syst. Video Technol., 2006

Hardware description of multi-layer perceptrons with different abstraction levels.
Microprocess. Microsystems, 2006

Real-Time Embedded System for Rear-View Mirror Overtaking Car Monitoring.
Proceedings of the Embedded Computer Systems: Architectures, 2006

Bio-inspired Motion-Based Object Segmentation.
Proceedings of the Image Analysis and Recognition, Third International Conference, 2006

Real Time Image Processing on a Portable Aid Device for Low Vision Patients.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

Towards an Optimal Implementation of MLP in FPGA.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

General Purpose Real-Time Image Segmentation System.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

Highly Paralellized Architecture for Image Motion Estimation.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

Event-Driven Simulation Engine for Spiking Neural Networks on a Chip.
Proceedings of the Reconfigurable Computing: Architectures and Applications, 2006

2005
Motion-Driven Segmentation by Competitive Neural Processing.
Neural Process. Lett., 2005

High Performance Stereo Computation Architecture.
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005

2004
Real-Time Visual Motion Detection of Overtaking Cars for Driving Assistance Using FPGAs.
Proceedings of the Field Programmable Logic and Application, 2004

Real Time Optical Flow Processing System.
Proceedings of the Field Programmable Logic and Application, 2004

2003
Neural Competitive Structures for Segmentation Based on Motion Features.
Proceedings of the Artificial Neural Nets Problem Solving Methods, 2003


  Loading...