Evaluation of Interconnection Networks Using Full-System Simulators: Lessons Learned. - Javier Navaridas; Francisco Javier Ridruejo Perez; José Miguel-Alonso (Annual Simulation Symposium, 2007)

Concepts and components of full-system simulation of distributed memory parallel computers. - Francisco Javier Ridruejo Perez; José Miguel-Alonso; Javier Navaridas (HPDC, 2007)

Mixed-radix Twisted Torus Interconnection Networks. - José M. Cámara; Miquel Moretó; Enrique Vallejo 001; Ramón Beivide; José Miguel-Alonso; Carmen Martínez; Javier Navaridas (IPDPS, 2007)

Realistic Evaluation of Interconnection Network Performance at High Loads. - Francisco Javier Ridruejo Perez; Javier Navaridas; José Miguel-Alonso; Cruz Izu (PDCAT, 2007)

On synthesizing workloads emulating MPI applications. - Javier Navaridas; José Miguel-Alonso; Francisco Javier Ridruejo Perez (IPDPS, 2008)

Understanding the interconnection network of SpiNNaker. - Javier Navaridas; Mikel Luján; José Miguel-Alonso; Luis A. Plana; Steve B. Furber (ICS, 2009)

Event-Driven Configuration of a Neural Network CMP System over a Homogeneous Interconnect Fabric. - Muhammad Mukaram Khan; Javier Navaridas; Alexander D. Rast; Xin Jin 003; Luis A. Plana; Mikel Luján; John V. Woods; José Miguel-Alonso; Steve B. Furber (ISPDC, 2009)

Realistic Evaluation of Interconnection Networks Using Synthetic Traffic. - Javier Navaridas; José Miguel-Alonso (ISPDC, 2009)

Effects of Topology-Aware Allocation Policies on Scheduling Performance. - Jose Antonio Pascual; Javier Navaridas; José Miguel-Alonso (JSSPP, 2009)

Effects of Job and Task Placement on Parallel Scientific Applications Performance. - Javier Navaridas; Jose Antonio Pascual; José Miguel-Alonso (PDP, 2009)

Full-system simulation of distributed memory multicomputers. - Francisco Javier Ridruejo; José Miguel-Alonso; Javier Navaridas (Clust. Comput., 2009)

Interconnection Network Simulation Using Traces of MPI Applications. - José Miguel-Alonso; Javier Navaridas; Francisco Javier Ridruejo Perez (Int. J. Parallel Program., 2009)

SpiNNaker: impact of traffic locality, causality and burstiness on the performance of the interconnection network. - Javier Navaridas; Luis A. Plana; José Miguel-Alonso; Mikel Luján; Stephen B. Furber (Conf. Computing Frontiers, 2010)

Reducing complexity in tree-like computer interconnection networks. - Javier Navaridas; José Miguel-Alonso; Francisco Javier Ridruejo; Wolfgang E. Denzel (Parallel Comput., 2010)

Twisted Torus Topologies for Enhanced Interconnection Networks. - José M. Cámara; Miquel Moretó; Enrique Vallejo 001; Ramón Beivide; José Miguel-Alonso; Carmen Martínez; Javier Navaridas (IEEE Trans. Parallel Distributed Syst., 2010)

Indirect cube: A power-efficient topology for compute clusters. - Javier Navaridas; José Miguel-Alonso (Opt. Switch. Netw., 2011)

Event-driven configuration of a neural network CMP system over an homogeneous interconnect fabric. - Mukaram M. Khan; Alexander D. Rast; Javier Navaridas; X. Jin; Luis A. Plana; Mikel Luján; Steve Temple; Cameron Patterson; Dominic Richards; John V. Woods; José Miguel-Alonso; Stephen B. Furber (Parallel Comput., 2011)

Simulating and evaluating interconnection networks with INSEE. - Javier Navaridas; José Miguel-Alonso; Jose Antonio Pascual; Francisco Javier Ridruejo (Simul. Model. Pract. Theory, 2011)

Analytical Assessment of the Suitability of Multicast Communications for the SpiNNaker Neuromimetic System. - Javier Navaridas; Mikel Luján; Luis A. Plana; José Miguel-Alonso; Stephen B. Furber (HPCC-ICESS, 2012)

Population-based routing in the SpiNNaker neuromorphic architecture. - Sergio Davies; Javier Navaridas; Francesco Galluppi; Steve B. Furber (IJCNN, 2012)

Reservation-based Network-on-Chip Timing Models for Large-scale Architectural Simulation. - Javier Navaridas; Behram Khan; Salman Khan 002; Paolo Faraboschi; Mikel Luján (NOCS, 2012)

Managing Burstiness and Scalability in Event-Driven Models on the SpiNNaker Neuromimetic System. - Alexander D. Rast; Javier Navaridas; Xin Jin 003; Francesco Galluppi; Luis A. Plana; José Miguel-Alonso; Cameron Patterson; Mikel Luján; Steve B. Furber (Int. J. Parallel Program., 2012)

Scalable communications for a million-core neural processing architecture. - Cameron Patterson; Jim D. Garside; Eustace Painkras; Steve Temple; Luis A. Plana; Javier Navaridas; Thomas Sharp; Steve B. Furber (J. Parallel Distributed Comput., 2012)

Transient Fault Tolerant QDI Interconnects Using Redundant Check Code. - Guangda Zhang; Wei Song 002; Jim D. Garside; Javier Navaridas; Zhiying Wang 003 (DSD, 2013)

SpiNNaker: Fault tolerance in a power- and area- constrained large-scale neuromimetic architecture. - Javier Navaridas; Steve B. Furber; Jim D. Garside; Xin Jin 003; Mukaram M. Khan; David R. Lester; Mikel Luján; José Miguel-Alonso; Eustace Painkras; Cameron Patterson; Luis A. Plana; Alexander D. Rast; et al. (Parallel Comput., 2013)

An Asynchronous SDM Network-on-Chip Tolerating Permanent Faults. - Guangda Zhang; Wei Song 002; Jim D. Garside; Javier Navaridas; Zhiying Wang 003 (ASYNC, 2014)

On generating multicast routes for SpiNNaker. - Javier Navaridas; Mikel Luján; Luis A. Plana; Steve Temple; Steve B. Furber (Conf. Computing Frontiers, 2014)

An empirical evaluation of High-Level Synthesis languages and tools for database acceleration. - Oriol Arcas-Abella; Geoffrey Ndu; Nehir Sönmez; Mohsen Ghasempour; Adrià Armejach; Javier Navaridas; Wei Song 002; John Mawer; Adrián Cristal; Mikel Luján (FPL, 2014)

Protecting QDI interconnects from transient faults using delay-insensitive redundant check codes. - Guangda Zhang; Wei Song 002; Jim D. Garside; Javier Navaridas; Zhiying Wang 003 (Microprocess. Microsystems, 2014)

Deadlock Recovery in Asynchronous Networks on Chip in the Presence of Transient Faults. - Guangda Zhang; Jim D. Garside; Wei Song 002; Javier Navaridas; Zhiying Wang 003 (ASYNC, 2015)

An Efficient Shortest-Path Routing Algorithm in the Data Centre Network DPillar. - Alejandro Erickson; Abbas Eslami Kiasari; Javier Navaridas; Iain A. Stewart (COCOA, 2015)

Accelerating Interconnect Analysis Using High-Level HDLs and FPGA, SpiNNaker as a Case Study. - Mohsen Ghasempour; Jonathan Heathcote; Javier Navaridas; Luis A. Plana; Jim D. Garside; Mikel Luján (FCCM, 2015)

Amon: An Advanced Mesh-like Optical NoC. - Sebastian Werner 002; Javier Navaridas; Mikel Luján (Hot Interconnects, 2015)

On Routing Algorithms for the DPillar Data Centre Networks. - Abbas Eslami Kiasari; Javier Navaridas; Iain A. Stewart (ICA3PP (4), 2015)

CHO: towards a benchmark suite for OpenCL FPGA accelerators. - Geoffrey Ndu; Javier Navaridas; Mikel Luján (IWOCL, 2015)

Analysis of FPGA and software approaches to simulate unconventional computer architectures. - Mohsen Ghasempour; Jonathan Heathcote; Javier Navaridas; Luis A. Plana; Jim D. Garside; Mikel Luján (ReConFig, 2015)

Routing Algorithms for Recursively-Defined Data Centre Networks. - Alejandro Erickson; Abbas Eslami Kiasari; Javier Navaridas; Iain A. Stewart (TrustCom/BigDataSE/ISPA (3), 2015)

An efficient shortest-path routing algorithm in the data centre network {DP}illar. - Alejandro Erickson; Abbas Eslami Kiasari; Javier Navaridas; Iain A. Stewart (CoRR, 2015)

Star-Replaced Networks: A Generalised Class of Dual-Port Server-Centric Data Centre Networks. - Alejandro Erickson; Iain A. Stewart; Javier Navaridas; Abbas Eslami Kiasari (CoRR, 2015)

SpiNNaker: Enhanced multicast routing. - Javier Navaridas; Mikel Luján; Luis A. Plana; Steve Temple; Steve B. Furber (Parallel Comput., 2015)

The ExaNeSt Project: Interconnects, Storage, and Packaging for Exascale Systems. - Manolis Katevenis; Nikolaos Chrysos; Manolis Marazakis; Iakovos Mavroidis; Fabien Chaix; Nikolaos D. Kallimanis; Javier Navaridas; John Goodacre; Piero Vicini; Andrea Biagioni; Pier Stanislao Paolucci; Alessandro Lonardo; et al. (DSD, 2016)

Cyclic Power-Gating as an Alternative to Voltage and Frequency Scaling. - Yaman Cakmaki; Will Toms; Javier Navaridas; Mikel Luján (IEEE Comput. Archit. Lett., 2016)

A Survey on Design Approaches to Circumvent Permanent Faults in Networks-on-Chip. - Sebastian Werner 002; Javier Navaridas; Mikel Luján (ACM Comput. Surv., 2016)

Designing an exascale interconnect using multi-objective optimization. - Jose Antonio Pascual; Joshua Lant; Andrew Attwood; Caroline Concatto; Javier Navaridas; Mikel Luján; John Goodacre (CEC, 2017)

The Next Generation of Exascale-Class Systems: The ExaNeSt Project. - Roberto Ammendola; Andrea Biagioni; Paolo Cretaro; Ottorino Frezza; Francesca Lo Cicero; Alessandro Lonardo; Michele Martinelli; Pier Stanislao Paolucci; Elena Pastorelli; Francesco Simula; Piero Vicini; Giuliano Taffoni; et al. (DSD, 2017)

On the Effects of Data-Aware Allocation on Fully Distributed Storage Systems for Exascale. - Jose Antonio Pascual; Caroline Concatto; Joshua Lant; Javier Navaridas (Euro-Par Workshops, 2017)

Subchannel Scheduling for Shared Optical On-chip Buses. - Sebastian Werner 002; Javier Navaridas; Mikel Luján (Hot Interconnects, 2017)

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links. - Sebastian Werner 002; Javier Navaridas; Mikel Luján (HPCA, 2017)

The stellar transformation: From interconnection networks to datacenter networks. - Alejandro Erickson; Iain A. Stewart; Javier Navaridas; Abbas Eslami Kiasari (Comput. Networks, 2017)

Improved routing algorithms in the dual-port datacenter networks HCN and BCN. - Alejandro Erickson; Iain A. Stewart; Jose Antonio Pascual; Javier Navaridas (Future Gener. Comput. Syst., 2017)

Efficient Sharing of Optical Resources in Low-Power Optical Networks-on-Chip. - Sebastian Werner 002; Javier Navaridas; Mikel Luján (JOCN, 2017)

An Optimal Single-Path Routing Algorithm in the Datacenter Network DPillar. - Alejandro Erickson; Abbas Eslami Kiasari; Javier Navaridas; Iain A. Stewart (IEEE Trans. Parallel Distributed Syst., 2017)

Handling Physical-Layer Deadlock Caused by Permanent Faults in Quasi-Delay-Insensitive Networks-on-Chip. - Guangda Zhang; Wei Song 002; Jim D. Garside; Javier Navaridas; Zhiying Wang 003 (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A CAM-Free Exascalable HPC Router for Low-Energy Communications. - Caroline Concatto; Jose Antonio Pascual; Javier Navaridas; Joshua Lant; Andrew Attwood; Mikel Luján; John Goodacre (ARCS, 2018)

Network-on-chip evaluation for a novel neural architecture. - Markos Kynigos; Javier Navaridas; Luis A. Plana; Steve B. Furber (CF, 2018)

High-Performance, Low-Complexity Deadlock Avoidance for Arbitrary Topologies/Routings. - Jose Antonio Pascual; Javier Navaridas (ICS, 2018)

A Survey on Optical Network-on-Chip Architectures. - Sebastian Werner 002; Javier Navaridas; Mikel Luján (ACM Comput. Surv., 2018)

Next generation of Exascale-class systems: ExaNeSt project and the status of its interconnect and storage development. - Manolis Katevenis; Roberto Ammendola; Andrea Biagioni; Paolo Cretaro; Ottorino Frezza; Francesca Lo Cicero; Alessandro Lonardo; Michele Martinelli; Pier Stanislao Paolucci; Elena Pastorelli; Francesco Simula; Piero Vicini; et al. (Microprocess. Microsystems, 2018)

Receive-Side Notification for Enhanced RDMA in FPGA Based Networks. - Joshua Lant; Andrew Attwood; Javier Navaridas; Mikel Luján; John Goodacre (ARCS, 2019)

Enabling Standalone FPGA Computing. - Joshua Lant; Javier Navaridas; Andrew Attwood; Mikel Luján; John Goodacre (Hot Interconnects, 2019)

Design Exploration of Multi-tier Interconnection Networks for Exascale Systems. - Javier Navaridas; Joshua Lant; Jose Antonio Pascual; Mikel Luján; John Goodacre (ICPP, 2019)

Robust Covert Channels Based on DRAM Power Consumption. - Thales Bandiera Paiva; Javier Navaridas; Routo Terada (ISC, 2019)

Scalability analysis of optical Beneš networks based on thermally/electrically tuned Mach-Zehnder interferometers. - Markos Kynigos; Jose Antonio Pascual; Javier Navaridas; Mikel Luján; John Goodacre (NoCArc@MICRO, 2019)

Enabling shared memory communication in networks of MPSoCs. - Joshua Lant; Caroline Concatto; Andrew Attwood; Jose Antonio Pascual; Mike Ashworth; Javier Navaridas; Mikel Luján; John Goodacre (Concurr. Comput. Pract. Exp., 2019)

On the effects of allocation strategies for exascale computing systems with distributed storage and unified interconnects. - Jose Antonio Pascual; Joshua Lant; Caroline Concatto; Andrew Attwood; Javier Navaridas; Mikel Luján; John Goodacre (Concurr. Comput. Pract. Exp., 2019)

Can the Optimizer Cost be Used to Predict Query Execution Times? - Anthony Kleerekoper; Javier Navaridas; Mikel Luján (CoRR, 2019)

INRFlow: An interconnection networks research flow-level simulation framework. - Javier Navaridas; Jose Antonio Pascual; Alejandro Erickson; Iain A. Stewart; Mikel Luján (J. Parallel Distributed Comput., 2019)

Message from the Conference Chairs - ASAP 2020. - Dirk Koch; Frank Hannig; Javier Navaridas (ASAP, 2020)

Relating the bisection width of dual-port, server-centric datacenter networks and the solution of edge isoperimetric problems in graphs. - Alejandro Erickson; Javier Navaridas; Iain A. Stewart (J. Comput. Syst. Sci., 2020)

Toward FPGA-Based HPC: Advancing Interconnect Technologies. - Joshua Lant; Javier Navaridas; Mikel Luján; John Goodacre (IEEE Micro, 2020)

Analysis of software and hardware-accelerated approaches to the simulation of unconventional interconnection networks. - Mohsen Ghasempour; Jonathan Heathcote; Javier Navaridas; Luis A. Plana; Jim D. Garside; Mikel Luján (Simul. Model. Pract. Theory, 2020)

Power and energy efficient routing for Mach-Zehnder interferometer based photonic switches. - Markos Kynigos; Jose Antonio Pascual; Javier Navaridas; John Goodacre; Mikel Luján (ICS, 2021)

On the routing and scalability of MZI-based optical Beneš interconnects. - Markos Kynigos; Jose Antonio Pascual; Javier Navaridas; Mikel Luján; John Goodacre (Nano Commun. Networks, 2021)

A review of Federated Learning in Intrusion Detection Systems for IoT. - Aitor Belenguer; Javier Navaridas; Jose Antonio Pascual (CoRR, 2022)

SiliconBurmuin: A Horizon Europe propelled Neurocomputing Initiative in the Basque Country. - Xabier Iturbe; Xabier Alberdi; Ander Aramburu; Armando Astarloa; Iñigo Barandiaran; Koldo Basterretxea; Angélica Dávila; Asier Erramuzpe; Iñigo Gabilondo; Garikoitz Lerma-Usabiaga; Lisandro Gabriel Monsalve; Libe Mori; et al. (SEAA, 2023)

QVal: A Novel Routing Algorithm for Dragonfly Networks. - Javier Navaridas; Jose Antonio Pascual (HPCC/DSS/SmartCity/DependSys, 2023)

A Novel Simulation Methodology for Silicon Photonic Switching Fabrics. - Markos Kynigos; Javier Navaridas; Jose Antonio Pascual; Mikel Luján (ISPASS, 2023)

Parallelizing Multipacting Simulation for the Design of Particle Accelerator Components. - Julen Galarza; Javier Navaridas; Jose Antonio Pascual; Txomin Romero; Juan L. Muñoz; Ibon Bustinduy (PDP, 2023)

GöwFed: A novel federated network intrusion detection system. - Aitor Belenguer; Jose Antonio Pascual; Javier Navaridas (J. Netw. Comput. Appl., 2023)

Understanding the Impact of Arbitration in MZI-Based Beneš Switching Fabrics. - Javier Navaridas; Markos Kynigos; Jose Antonio Pascual; Mikel Luján; José Miguel-Alonso; John Goodacre (IEEE Trans. Parallel Distributed Syst., 2024)

On the parallelization of multipacting simulation codes for the design of particle accelerator components. - Javier Navaridas; Jose Antonio Pascual; Julen Galarza; Txomin Romero; Juan L. Muñoz; Ibon Bustinduy (J. Supercomput., 2024)

A Review of Federated Learning Applications in Intrusion Detection Systems. - Aitor Belenguer; Jose Antonio Pascual; Javier Navaridas (Comput. Networks, 2025)

Improving the performance of Dragonfly networks through restrictive Proxy routing strategies. - Javier Navaridas; Jose Antonio Pascual (Comput. Networks, 2025)

GLow - A Novel, Flower-Based Simulated Gossip Learning Strategy. - Aitor Belenguer; Jose Antonio Pascual; Javier Navaridas (CoRR, 2025)