VLSI residue multiplier modulo a Fermat number. - Irving S. Reed; Trieu-Kien Truong; Jaw John Chang; Howard M. Shao; In-Shek Hsu (IEEE Symposium on Computer Arithmetic, 1985)

The VLSI design of a single chip for the multiplication of integers modulo a Fermat number. - Jaw John Chang; Trieu-Kien Truong; Howard M. Shao; Irving S. Reed; In-Shek Hsu (IEEE Trans. Acoust. Speech Signal Process., 1985)

Techniques for Computing the Discrete Fourier Transform Using the Quadratic Residue Fermat Number Systems. - Trieu-Kien Truong; Jaw John Chang; In-Shek Hsu; D. Y. Pei; Irving S. Reed (IEEE Trans. Computers, 1986)

A new VLSI complex integer multiplier which uses a quadratic-polynomial residue system with fermat numbers. - Hsuen-Chyun Shyu; Trieu-Kien Truong; Irving S. Reed; In-Shek Hsu; Jaw John Chang (IEEE Trans. Acoust. Speech Signal Process., 1987)