Jayanta Mukherjee
Orcid: 0000-0001-9009-0262Affiliations:
- Indian Institute of Technology Bombay, Mumbai, India
According to our database1,
Jayanta Mukherjee
authored at least 13 papers
between 2003 and 2022.
Collaborative distances:
Collaborative distances:
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Bibliography
2022
Investigation of Input-Output Waveform Engineered High-Efficiency Broadband Class B/J Power Amplifier.
IEEE Access, 2022
2021
An Inductorless Wideband Gm-Boosted Balun LNA With nMOS-pMOS Configuration and Capacitively Coupled Loads for Sub-GHz IoT Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2021
PFD with improved average gain and minimal blind zone combined with lock-in detection for fast settling PLLs.
Microelectron. J., 2021
2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
A New Architecture of the Phase Frequency Detector with Improved Gain and Minimal Blind Zone for Fast Settling PLLs.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
2019
An Inductorless Noise Cancelling Wideband Balun LNA with Dual Shunt Feedback and Current Reuse.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019
2015
Proceedings of the Twenty First National Conference on Communications, 2015
Proceedings of the Computational Intelligence in Digital and Network Designs and Applications, 2015
2014
Proceedings of the Twentieth National Conference on Communications, 2014
Proceedings of the Twentieth National Conference on Communications, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
2007
An Analytic Circuit-Based Model for White and Flicker Phase Noise in <i>LC</i> Oscillators.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007
2003
RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool.
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003