Logic BIST Architecture for System-Level Test and Diagnosis. - Jun Qian; Xingang Wang; Qinfu Yang; Fei Zhuang; Junbo Jia; Xiangfeng Li; Yuan Zuo; Jayanth Mekkoth; Jinsong Liu; Hao-Jan Chao; Shianling Wu; Huafeng Yang; et al. (Asian Test Symposium, 2009)

Physical-design-friendly hierarchical logic built-in self-test - A case study. - Kelvin Nelson; Jaga Shanmugavadivelu; Jayanth Mekkoth; Venkat Ghanta; Jun Wu; Fei Zhuang; Hao-Jan Chao; Shianling Wu; Jie Rao; Lizhen Yu; Laung-Terng Wang (ISQED, 2012)