An Iterative Array for Multiplication of Signed Binary Numbers. - Jayanti C. Majithia; Reuven Kitai (IEEE Trans. Computers, 1971)

A Cellular Array for the Nonrestoring Extraction of Square Roots. - Jayanti C. Majithia; Reuven Kitai (IEEE Trans. Computers, 1971)

Comments on "A Fast Digital Computer Method for Recursive Estimation of the Mean". - Jayanti C. Majithia (IEEE Trans. Computers, 1972)

Cellular Array for Extraction of Squares and Square Roots of Binary Numbers. - Jayanti C. Majithia (IEEE Trans. Computers, 1972)

A Simple Technique for Determination of Essential Multiple Output Prime Implicants. - Jayanti C. Majithia (IEEE Trans. Computers, 1972)

Some Comments Concerning Design of Pipeline Arithmetic Arrays. - Jayanti C. Majithia (IEEE Trans. Computers, 1976)

Analysis of a Shared Resource MIMD Computer Organization. - R. C. Pearce; Jayanti C. Majithia (IEEE Trans. Computers, 1978)

An Adaptive Loop-Type Data Network. - Wilfred L. W. Yu; Jayanti C. Majithia (Comput. Networks, 1979)

An Analysis of One Direction of Window Mechanism. - Wilfred L. W. Yu; Jayanti C. Majithia (IEEE Trans. Commun., 1979)

Access Protocols for Circuit/Packet Switching Networks. - Wilfred L. W. Yu; Jayanti C. Majithia; Johnny W. Wong (Comput. Networks, 1980)

Congestion control for a packet-switched network. - J. L. Grange; Jayanti C. Majithia (Comput. Commun., 1980)

A Comparative Study of Some Two-Processor Organizations. - Shashi K. Mehra; Johnny W. Wong; Jayanti C. Majithia (IEEE Trans. Computers, 1980)

Design and evaluation of an interface for an integrated service data network. - A. R. Telfer; Jayanti C. Majithia (Comput. Commun., 1981)

Buffer analysis of an integrated voice and data terminal. - Jayanti C. Majithia; San-qi Li (Comput. Commun., 1983)

Performance Analysis of a DTDMA Local Area Network for Voice and Data. - San-qi Li; Jayanti C. Majithia (Comput. Networks, 1984)

Analysis of playout strategies for voice transmission using packet switching techniques. - P. M. Gopal; Johnny W. Wong; Jayanti C. Majithia (Perform. Evaluation, 1984)

Congestion control technique for an integrated services local area network. - Jayanti C. Majithia; San-qi Li; Tracy Parker (Comput. Commun., 1985)

Performance evaluation of an Ethernet LAN with broadcast and point-to-point data traffic. - Liu Mai; Jayanti C. Majithia (Comput. Commun., 1987)

Allocation of multiport memories in data path synthesis. - M. Balakrishnan; Arun K. Majumdar; Dilip K. Banerji; James G. Linders; Jayanti C. Majithia (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1988)

Dynamic bandwidth allocation technique for high speed LANs. - H. L. Pell; Jayanti C. Majithia (Comput. Commun., 1990)

Integrated approach to area-time tradeoff for built-in-self-test in VLSI circuits. - Anupam Basu; Thomas Charles Wilson; Dilip K. Banerji; Jayanti C. Majithia (Great Lakes Symposium on VLSI, 1991)

Test plan generation and concurrent scheduling of tests in the presence of conflicts. - Thomas Charles Wilson; Anupam Basu; Dilip K. Banerji; Jayanti C. Majithia (Great Lakes Symposium on VLSI, 1991)

An Approach to Minimize Testability Overhead for BILBO based Built-In-Self-Test. - Anupam Basu; Thomas Charles Wilson; Dilip K. Banerji; Jayanti C. Majithia (VLSI Design, 1992)

A Modified Approach to Test Plan Generation for Combinational Logic Blocks. - Anupam Basu; Dilip K. Banerji; Amit Basu; Thomas Charles Wilson; Jayanti C. Majithia (VLSI Design, 1996)