Integration of SRAM Redundancy into Production Test. - Jayasanker Jayabalan; Juraj Povazanec (ITC, 2002)

PLL Based High Speed Functional Testing. - Jayasanker Jayabalan; Kiang Goh Chee; Ban-Leong Ooi; Mook Seng Leong; Mahadevan K. Iyer; Andrew A. O. Tay (Asian Test Symposium, 2003)

Multi-Gigahertz Testing of Wafer-Level Packaged Devices. - A. M. Majid; David C. Keezer; Jayasanker Jayabalan; Mihai Rotaru (ITC, 2006)

Current Mirror Array: A Novel Circuit Topology for Combining Physical Unclonable Function and Machine Learning. - Zheng Wang 027; Yi Chen 012; Aakash Patil; Jayasanker Jayabalan; Xueyong Zhang; Chip-Hong Chang; Arindam Basu (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A Spatial-Physics Informed Model for 3D Spiral Sample Scanned by SQUID Microscopy. - J. Senthilnath 001; Jayasanker Jayabalan; Zhuoyi Lin; Aye Phyu Phyu Aung; Chen Hao; Kaixin Xu; Yeow Kheng Lim; F. C. Wellstood (CoRR, 2025)