A 16x16 Programmable Anlaog Vector Matrix Multiplier using CMOS compatible Floating gate device. - Yong-Hyun Kim; Jong-Moon Choi; Je-Joong Woo; Eun-Je Park; Sang-Won Kim; Kee-Won Kwon (ICEIC, 2019)

CMOS-Compatible Learning Device for Neuromorphic Synapse Application using Adjustable Hot Carrier Injections. - Je-Joong Woo; Jong-Moon Choi; Kee-Won Kwon (MWSCAS, 2019)

A 35x10 Charge-Trap Synaptic Memory for 57xMatrix Recognition. - Eun-Je Park; Jong-Moon Choi; Do-Wan Kwon; Je-Joong Woo; Kee-Won Kwon (AICAS, 2020)

Implementation of an On-Chip Learning Neural Network IC Using Highly Linear Charge Trap Device. - Jong-Moon Choi; Do-Wan Kwon; Je-Joong Woo; Eun-Je Park; Kee-Won Kwon (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)