Etude critique et données de compilation du langage Cobol. (Study critical and compilation data of the language COBOL). - Jean-Loup Baer (1963)

Compilation of arithmetic expressions for parallel computations. - Jean-Loup Baer; Daniel P. Bovet (IFIP Congress (1), 1968)

Bounds for Maxium Parallelism in a Bilogic Graph Model of Computations. - Jean-Loup Baer; Gerald Estrin (IEEE Trans. Computers, 1969)

Legality and Other Properties of Graph Models of Computations. - Jean-Loup Baer; Daniel P. Bovet; Gerald Estrin (J. ACM, 1970)

Measurement and Improvement of Program Behavior under Paging Systems. - Jean-Loup Baer; Gary R. Sager (Statistical Computer Performance Evaluation, 1972)

Segmentation and optimization of programs from cyclic structure analysis. - Jean-Loup Baer; Robert Caughey (AFIPS Spring Joint Computing Conference, 1972)

A Survey of Some Theoretical Aspects of Multiprocessing. - Jean-Loup Baer (ACM Comput. Surv., 1973)

Models for the design, simulation, and performance of distributed-function architecture. - Jean-Loup Baer (Computer, 1974)

On Program Placement in a Directly Executable Hierarchy of Memories. - Jean-Loup Baer (IEEE Trans. Computers, 1974)

Weight-balanced trees. - Jean-Loup Baer (AFIPS National Computer Conference, 1975)

A Model of Interference in a Shared Resource Multiprocessor. - John E. Jensen; Jean-Loup Baer (ISCA, 1976)

The Formal Definition of Semantics by String Automata. - G. Kampen; Jean-Loup Baer (Comput. Lang., 1976)

Multiprocessing Systems. - Jean-Loup Baer (IEEE Trans. Computers, 1976)

Dynamic Improvement of Locality in Virtual Memory Systems. - Jean-Loup Baer; Gary R. Sager (IEEE Trans. Software Eng., 1976)

Correction to "Dynamic Improvement of Locality in Virtual Memory Systems". - Jean-Loup Baer; Gary R. Sager (IEEE Trans. Software Eng., 1976)

On the Efficiency of Some List Marketing Algorithms. - Jean-Loup Baer; M. Fries (IFIP Congress, 1977)

Simulation of Large Parallel Systems: Modelling of Tasks. - Jean-Loup Baer; John E. Jensen (Performance, 1977)

A Comparison of Tree-Balancing Algorithms. - Jean-Loup Baer; B. Schwab (Commun. ACM, 1977)

Model, Design, and Evaluation of a Compiler for a Parallel Processing Environment. - Jean-Loup Baer; Carla Schlatter Ellis (IEEE Trans. Software Eng., 1977)

Software control and program design issues for alterable architectures. - Jean-Loup Baer (COMPSAC, 1978)

On the Minimization of the Width of the Control Memory of Microprogammed Processors. - Jean-Loup Baer; Barbara Koyama (IEEE Trans. Computers, 1979)

The Two-Step Commitment Protocol: Modeling, Specification and Proof Methodology. - Jean-Loup Baer; Georges Gardarin; Claude Girault; Gérard Roucairol (ICSE, 1981)

Query costs in HB(1) trees versus 2-3 trees. - Ahmed S. Zaki; Jean-Loup Baer (Int. J. Parallel Program., 1981)

On the Performance of Interleaved Memories with Non-Uniform Access Probabilities. - Hung-Chang Du; Jean-Loup Baer (ICPP, 1983)

Binary Search in a Multiprocessing Environment. - Jean-Loup Baer; Hung-Chang Du; Richard E. Ladner (IEEE Trans. Computers, 1983)

An Economical Solution to the Cache Coherence Problem. - James K. Archibald; Jean-Loup Baer (ISCA, 1984)

Computer Architecture. - Jean-Loup Baer (Computer, 1984)

Parallel Tag-Distribution Sort. - Sai Choi Kwan; Jean-Loup Baer; G. Zick; T. Snyder (ICPP, 1985)

The I/O Performance of Multiway Mergesort and Tag Sort. - Sai Choi Kwan; Jean-Loup Baer (IEEE Trans. Computers, 1985)

Modelling Architectural Features with Petri Nets. - Jean-Loup Baer (Advances in Petri Nets, 1986)

Cache Coherence Protocols: Evaluation Using a Multiprocessor Simulation Model. - James K. Archibald; Jean-Loup Baer (ACM Trans. Comput. Syst., 1986)

Architectural Choices for Multi-level Cache Hierarchies. - Jean-Loup Baer; Wen-Hann Wang (ICPP, 1987)

A Notation for Describing Multiple Views of VLSI Circuits. - Jean-Loup Baer; Meei-Chiueh Liem; Larry McMurchie; Rudolf Nottrott; Lawrence Snyder 001; Wayne Winder (DAC, 1988)

On the Inclusion Properties for Multi-Level Cache Hierarchies. - Jean-Loup Baer; Wen-Hann Wang (ISCA, 1988)

A Timestamp-based Cache Coherence Scheme. - Sang Lyul Min; Jean-Loup Baer (ICPP (1), 1989)

Extending the Memory Hierarchy into Multiprocessor Interconnection Networks: A Performance Analysis. - Haim E. Mizrahi; Jean-Loup Baer; Edward D. Lazowska; John Zahorjan (ICPP (1), 1989)

Introducing Memory into Switch Elements of Multiprocessor Interconnection Networks. - Haim E. Mizrahi; Jean-Loup Baer; Edward D. Lazowska; John Zahorjan (ISCA, 1989)

Organization and Performance of a Two-Level Virtual-Real Cache Hierarchy. - Wen-Hann Wang; Jean-Loup Baer; Henry M. Levy (ISCA, 1989)

Multilevel Cache Hierarchies: Organizations, Protocols, and Performance. - Jean-Loup Baer; Wen-Hann Wang (J. Parallel Distributed Comput., 1989)

Improving Quicksort Performance with a Codewort Data Structure. - Jean-Loup Baer; Yi-Bing Lin (IEEE Trans. Software Eng., 1989)

A Performance Comparison of Directory-based and Timestamp-based Cache Coherence Schemes. - Sang Lyul Min; Jean-Loup Baer (ICPP (1), 1990)

An efficient caching support for critical sections in large-scale shared-memory multiprocessors. - Sang Lyul Min; Jean-Loup Baer; Hyoung-Joo Kim (ICS, 1990)

On Synchronization Patterns in Parallel Programs. - Jean-Loup Baer; Richard N. Zucker (ICPP (2), 1991)

An effective on-chip preloading scheme to reduce data access penalty. - Jean-Loup Baer; Tien-Fu Chen (SC, 1991)

Efficient Trace-Driven Simulation Methods for Cache Performance Analysis. - Wen-Hann Wang; Jean-Loup Baer (ACM Trans. Comput. Syst., 1991)

Reducing Memory Latency via Non-blocking and Prefetching Caches. - Tien-Fu Chen; Jean-Loup Baer (ASPLOS, 1992)

A Performance Study of Memory Consistency Models. - Richard N. Zucker; Jean-Loup Baer (ISCA, 1992)

Scaling shared-bus multiprocessors with multiple buses and shared caches: a performance study. - Jonathan Bertoni; Jean-Loup Baer; Wen-Hann Wang (Microprocess. Microsystems, 1992)

Design and Analysis of a Scalable Cache Coherence Scheme Based on Clocks and Timestamps. - Sang Lyul Min; Jean-Loup Baer (IEEE Trans. Parallel Distributed Syst., 1992)

A Multi-Level Hierarchical Cache Coherence Protocol for Multiprocessors. - Craig Anderson 001; Jean-Loup Baer (IPPS, 1993)

An Evaluation of Hardware and Software Data Prefetching. - Jean-Loup Baer; Tien-Fu Chen (Applications in Parallel and Distributed Computing, 1994)

Software versus Hardware Coherence: Performance versus Cos. - Richard N. Zucker; Jean-Loup Baer (HICSS (1), 1994)

A Parallel Trace-driven Simulator: Implementation and Performance. - Xiaohan Qin; Jean-Loup Baer (ICPP (2), 1994)

A Performance Study of Software and Hardware Data Prefetching Schemes. - Tien-Fu Chen; Jean-Loup Baer (ISCA, 1994)

Cache-Based Data Distribution Constrained Scheduling. - Sang Lyul Min; Jae H. Nam; Myung Soon Park; Jean-Loup Baer (Int. J. High Speed Comput., 1994)

A comparative study of conservative and optimistic trace-driven simulations. - Xiaohan Qin; Jean-Loup Baer (Annual Simulation Symposium, 1995)

Instruction Cache Fetch Policies for Speculative Execution. - Dennis Lee 001; Jean-Loup Baer; Brad Calder; Dirk Grunwald (ISCA, 1995)

Two techniques for improving performance on bus-based multiprocessors. - Craig Anderson 001; Jean-Loup Baer (Future Gener. Comput. Syst., 1995)

Effective Hardware Based Data Prefetching for High-Performance Processors. - Tien-Fu Chen; Jean-Loup Baer (IEEE Trans. Computers, 1995)

The Structure and Performance of Interpreters. - Theodore H. Romer; Dennis Lee 001; Geoffrey M. Voelker; Alec Wolman; Wayne A. Wong; Jean-Loup Baer; Brian N. Bershad; Henry M. Levy (ASPLOS, 1996)

On the Use and Performance of Explicit Communication Primitives in Cache-Coherent Multiprocessor Systems. - Xiaohan Qin; Jean-Loup Baer (HPCA, 1997)

A Performance Evaluation of Cluster-Based Architectures. - Xiaohan Qin; Jean-Loup Baer (SIGMETRICS, 1997)

Retrospective: On the Inclusion Properties for Multi-Level Cache Hierarchies. - Jean-Loup Baer; Wen-Hann Wang (25 Years ISCA: Retrospectives and Reprints, 1998)

Execution Characteristics of Desktop Applications on Windows NT. - Dennis C. Lee; Patrick Crowley; Jean-Loup Baer; Thomas E. Anderson; Brian N. Bershad (ISCA, 1998)

Optimizing Software Cache-coherent Cluster Architectures. - Xiaohan Qin; Jean-Loup Baer (SC, 1998)

Pursuing the Performance Potential of Dynamic Cache Line Sizes. - Peter van Vleet; Eric J. Anderson; Lindsay Brown; Jean-Loup Baer; Anna R. Karlin (ICCD, 1999)

On the Use of Trace Sampling for Architectural Studies of Desktop Applications. - Patrick Crowley; Jean-Loup Baer (SIGMETRICS, 1999)

Modified LRU Policies for Improving Second-Level Cache Behavior. - Wayne A. Wong; Jean-Loup Baer (HPCA, 2000)

Characterizing processor architectures for programmable network interfaces. - Patrick Crowley; Marc E. Fiuczynski; Jean-Loup Baer; Brian N. Bershad (ICS, 2000)

Cost-Effective Compiler Directed Memory Prefetching and Bypassing. - Daniel Ortega; Eduard Ayguadé; Jean-Loup Baer; Mateo Valero (IEEE PACT, 2002)

Memory Hierarchy Design for a Multiprocessor Look-up Engine. - Jean-Loup Baer; Douglas Low; Patrick Crowley; Neal Sidhwaney (IEEE PACT, 2003)