A flexible communication scheme for rationally-related clock frequencies. - Jean-Michel Chabloz; Ahmed Hemani (ICCD, 2009)

Lowering the latency of interfaces for rationally-related frequencies. - Jean-Michel Chabloz; Ahmed Hemani (ICCD, 2010)

Distributed DVFS using rationally-related frequencies and discrete voltage levels. - Jean-Michel Chabloz; Ahmed Hemani (ISLPED, 2010)

The MOSART Mapping Optimization for Multi-Core ARchiTectures. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI (Selected papers), 2010)

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI, 2010)

An Algorithm for Constructing a Fastest Galois NLFSR Generating a Given Sequence. - Jean-Michel Chabloz; Shohreh Sharif Mansouri; Elena Dubrova (SETA, 2010)

Low-Latency and Low-Overhead Mesochronous and Plesiochronous Synchronizers. - Jean-Michel Chabloz; Ahmed Hemani (DSD, 2011)

A GALS Network-on-Chip based on rationally-related frequencies. - Jean-Michel Chabloz; Ahmed Hemani (ICCD, 2011)

Low-Latency No-Handshake GALS Interfaces for Fast-Receiver Links. - Jean-Michel Chabloz; Ahmed Hemani (VLSI Design, 2012)

Power-aware dynamic memory management on many-core platforms utilizing DVFS. - Iraklis Anagnostopoulos; Jean-Michel Chabloz; Ioannis Koutras; Alexandros Bartzas; Ahmed Hemani; Dimitrios Soudris (ACM Trans. Embed. Comput. Syst., 2013)

Low-Latency Maximal-Throughput Communication Interfaces for Rationally Related Clock Domains. - Jean-Michel Chabloz; Ahmed Hemani (IEEE Trans. Very Large Scale Integr. Syst., 2014)