2nd workshop on advances in open runtime technology for cloud environments. - Daryl Maier; Kenneth B. Kent; Ben Thomas; Mark Thom; Vijay Sundaresan; Shelley Lambert; Leonardo Banderali; Younes Manton; Aaron Graham; Jean-Philippe Legault; Kim Briggs; Abhijit Taware (CASCON, 2018)

Towards Trainable Synthesis for Optimized Circuit Deployment on FPGA. - Jean-Philippe Legault; Panagiotis Patros; Kenneth B. Kent (RSP, 2018)

Improving Digital Circuit Simulation with Batch-Parallel Logic Evaluation. - Maria Patrou; Jean-Philippe Legault; Aaron Graham; Kenneth B. Kent (DSD, 2019)

Verilog Loop Unrolling, Module Generation, Part-Select and Arithmetic Right Shift Support in Odin II. - Scott Ryan Young; Alexandrea Demmings; Nasrin Eshraghi Ivari; Jean-Philippe Legault; Kenneth B. Kent (RSP, 2019)

Hard and Soft Logic Trade-offs for Multipliers in VTR. - Georgiy Krylov; Jean-Philippe Legault; Kenneth B. Kent (DSD, 2020)

Desired Footprint by Technology Mapping Modification using a Genetic Algorithm in Odin II. - Seyed Alireza Damghani; Jean-Philippe Legault; Kenneth B. Kent (RSP, 2020)

VTR 8: High-performance CAD and Customizable FPGA Architecture Modelling. - Kevin E. Murray; Oleg Petelin; Sheng Zhong; Jia Min Wang; Mohamed Eldafrawy; Jean-Philippe Legault; Eugene Sha; Aaron Graham; Jean Wu; Matthew J. P. Walker; Hanqing Zeng; Panagiotis Patros; et al. (ACM Trans. Reconfigurable Technol. Syst., 2020)

Evaluating the Performance of the Eclipse OpenJ9 JVM JIT Compiler on AArch64. - Aaron Graham; Jean-Philippe Legault; Hillary Soontiens; Julie Brown; Stephen A. MacKay; Gerhard W. Dueck; Kenneth B. Kent; Kazuhiro Konno; Daryl Maier (CCECE, 2022)