Design of SOI CMOS operational amplifiers for applications up to 300°C. - Jean-Paul Eggennont; Denis De Ceuster; Denis Flandre; Bernard Gentinne; Paul G. A. Jespers; Jean-Pierre Colinge (IEEE J. Solid State Circuits, 1996)

Potential and modeling of 1-μm SOI CMOS operational transconductance amplifiers for applications up to 1 GHz. - Jean-Paul Eggermont; Denis Flandre; Jean-Pierre Raskin; Jean-Pierre Colinge (IEEE J. Solid State Circuits, 1998)

Influence of device geometry on SOI single-hole transistor characteristics. - Xiaohui Tang; Xavier Baie; Jean-Pierre Colinge; Pierre Loumaye; Christian Renaux; Vincent Bayot (Microelectron. Reliab., 2001)

Increased hot carrier effects in Gate-All-Around SOI nMOSFET's. - Jong Tae Park 003; Nag Jong Choi; Chong-Gun Yu; Seok Hee Jeon; Jean-Pierre Colinge (Microelectron. Reliab., 2003)

Reduced Hot Carrier Effects in Self-Aligned Ground-Plane FDSOI MOSFET's. - Se Re Na Yun; Chong-Gun Yu; Seok Hee Jeon; Chungkyue Kim; Jong Tae Park 003; Jean-Pierre Colinge (Microelectron. Reliab., 2004)

NBTI and hot-carrier effects in accumulation-mode Pi-gate pMOSFETs. - Chi-Woo Lee; Isabelle Ferain; Aryan Afzalian; Ran Yan; Nima Dehdashti; Pedram Razavi; Jean-Pierre Colinge; Jong Tae Park 003 (Microelectron. Reliab., 2009)

Investigation of high-performance sub-50 nm junctionless nanowire transistors. - Ran Yan; Abhinav Kranti; Isabelle Ferain; Chi-Woo Lee; Ran Yu 002; Nima Dehdashti; Pedram Razavi; Jean-Pierre Colinge (Microelectron. Reliab., 2011)

Multigate transistors as the future of classical metal-oxide-semiconductor field-effect transistors. - Isabelle Ferain; Cynthia A. Colinge; Jean-Pierre Colinge (Nat., 2011)

Prospective for nanowire transistors. - Jean-Pierre Colinge; Sang H. Dhong (CICC, 2013)