Another Glance at Relay Stations in Latency-Insensitive Design. - Julien Boucaron; Jean-Vivien Millo; Robert de Simone (FMGALS@MEMOCODE, 2005)

Latency-insensitive design and central repetitive scheduling. - Julien Boucaron; Robert de Simone; Jean-Vivien Millo (MEMOCODE, 2006)

Formal Methods for Scheduling of Latency-Insensitive Designs. - Julien Boucaron; Robert de Simone; Jean-Vivien Millo (EURASIP J. Embed. Syst., 2007)

Compositionality of Statically Scheduled IP. - Julien Boucaron; Jean-Vivien Millo (FMGALS@MEMOCODE, 2007)

Ordonnancements périodiques dans les réseaux de processus : Application à la conception insensible aux latences. (Static scheduling in process networks : application to latency insentitive design). - Jean-Vivien Millo (2008)

Integrated analysis of software product lines: a constraint based framework for consistency, liveness, and commonness checking. - Jean-Vivien Millo; Swarup Mohalik; S. Ramesh 002 (ISEC, 2011)

Relating Requirement and Design Variabilities. - Jean-Vivien Millo; S. Ramesh 002 (APSEC Workshops, 2012)

Tracing SPLs precisely and efficiently. - Swarup Mohalik; S. Ramesh 002; Jean-Vivien Millo; Shankara Narayanan Krishna; Ganesh Khandu Narwane (SPLC (1), 2012)

Formalizing Traceability and Derivability in Software Product Lines - Shankara Narayanan Krishna; Ganesh Khandu Narwane; S. Ramesh 002; Swarup Mohalik; Jean-Vivien Millo (CoRR, 2012)

Compositional Verification of Evolving Software Product Lines - Jean-Vivien Millo; S. Ramesh 002; Shankara Narayanan Krishna; Ganesh Khandu Narwane (CoRR, 2012)

Periodic scheduling of marked graphs using balanced binary words. - Jean-Vivien Millo; Robert de Simone (Theor. Comput. Sci., 2012)

A metamodeling approach for reasoning on multiple requirements models. - Arda Goknil; Ivan Kurtev; Jean-Vivien Millo (EDOC, 2013)

Boundness Issues in CCSL Specifications. - Frédéric Mallet; Jean-Vivien Millo (ICFEM, 2013)

Compositional Verification of Software Product Lines. - Jean-Vivien Millo; S. Ramesh 002; Shankara Narayanan Krishna; Ganesh Khandu Narwane (IFM, 2013)

Safe CCSL specifications and marked graphs. - Frédéric Mallet; Jean-Vivien Millo; Robert de Simone (MEMOCODE, 2013)

Scenario-based verification in presence of variability using a synchronous approach. - Jean-Vivien Millo; Frédéric Mallet; Anthony Coadou; S. Ramesh 002 (Frontiers Comput. Sci., 2013)

Explicit routing schemes for implementation of cellular automata on processor arrays. - Jean-Vivien Millo; Robert de Simone (Nat. Comput., 2013)

Progressive and explicit refinement of scheduling for multidimensional data-flow applications using UML MARTE. - Calin Glitia; Julien DeAntoni; Frédéric Mallet; Jean-Vivien Millo; Pierre Boulet; Abdoulaye Gamatié (Des. Autom. Embed. Syst., 2015)

Modeling and Analyzing Dataflow Applications on NoC-Based Many-Core Architectures. - Jean-Vivien Millo; Emilien Kofman; Robert de Simone (ACM Trans. Embed. Comput. Syst., 2015)

Traceability Analyses between Features and Assets in Software Product Lines. - Ganesh Khandu Narwane; José Angel Galindo; Shankara Narayanan Krishna; David Benavides 001; Jean-Vivien Millo; S. Ramesh 002 (Entropy, 2016)

Explicit Control of Dataflow Graphs with MARTE/CCSL. - Jean-Vivien Millo; Amine Oueslati; Emilien Kofman; Julien DeAntoni; Frédéric Mallet; Robert de Simone (MODELSWARD, 2017)