A Wireless Transceiver with Integrated Data Converters for 802.11a/b/g Access Points. - Tony Montalvo; C. Angell; David J. McLaurin; Corey Petersen; Eric Fogleman; Janet Brunsilius; Phil Brown; Ege Yetis; Jeff Bray; M. Kessler; Bernard Tenbroek (ISSCC, 2006)

A 16b 250MS/s IF-sampling pipelined A/D converter with background calibration. - Ahmed M. A. Ali; Andy Morgan; Christopher Dillon; Greg Patterson; Scott Puckett; Mike Hensley; Russell Stop; Paritosh Bhoraskar; Scott Bardsley; David Lattimore; Jeff Bray; Carroll Speir; et al. (ISSCC, 2010)

A 16-bit 250-MS/s IF Sampling Pipelined ADC With Background Calibration. - Ahmed M. A. Ali; Andrew S. Morgan; Christopher Dillon; Greg Patterson; Scott Puckett; Paritosh Bhoraskar; Hüseyin Dinc; Mike Hensley; Russell Stop; Scott Bardsley; David Lattimore; Jeff Bray; et al. (IEEE J. Solid State Circuits, 2010)

A 16b 80MS/s 100mW 77.6dB SNR CMOS pipeline ADC. - Janet Brunsilius; Eric Siragusa; Steve Kosic; Frank Murden; Ege Yetis; Binh Luu; Jeff Bray; Phil Brown; Allen Barlow (ISSCC, 2011)

16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology. - Siddharth Devarajan; Larry Singer; Dan Kelly; Steve Kosic; Tao Pan; José B. Silva; Janet Brunsilius; Daniel Rey-Losada; Frank Murden; Carroll Speir; Jeff Bray; Eric Otte; et al. (ISSCC, 2017)

A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology. - Siddharth Devarajan; Larry Singer; Dan Kelly; Tao Pan; José B. Silva; Janet Brunsilius; Daniel Rey-Losada; Frank Murden; Carroll Speir; Jeff Bray; Eric Otte; Nevena Rakuljic; et al. (IEEE J. Solid State Circuits, 2017)

In-situ nonlinear calibration of a RF signal chain. - Nevena Rakuljic; Carroll Speir; Eric Otte; Jeff Bray; Corey Petersen; Gabriele Manganaro (ISCAS, 2018)