Hierarchical DFT Methodology - A Case Study. - Jeff Remmers; Moe Villalba; Richard Fisette (ITC, 2004)

Hierarchical DFT with enhancements for AC scan, test scheduling and on-chip compression - a case study. - Jeff Remmers; Darin Lee; Richard Fisette (ITC, 2005)

Characterize Predicted vs Actual IR Drop in a Chip Using Scan Clocks. - Zahi S. Abuhamdeh; Philip Pears; Jeff Remmers; Alfred L. Crouch; Bob Hannagan (ITC, 2006)

A Production IR-Drop Screen on a Chip. - Zahi S. Abuhamdeh; Bob Hannagan; Jeff Remmers; Alfred L. Crouch (IEEE Des. Test Comput., 2007)