Low-power DV encoder architecture for digital CMOS camcorder. - Jeff Y. F. Hsieh; Teresa H. Meng (ICASSP, 1999)

Low-Power Parallel Video Compression Architecture for a Single-Chip Digital CMOS Camera. - Jeff Y. F. Hsieh; Teresa H.-Y. Meng (J. VLSI Signal Process., 1999)

Transpose Memory for Video Rate JPEG Compression on Highly Parallel Single-Chip Digital CMOS Imager. - Jeff Y. F. Hsieh; André van der Avoird; Richard P. Kleihorst; Teresa H.-Y. Meng (ICIP, 2000)