An integrated 120 volt AC mains voltage interface in standard 130 nm CMOS. - Andres Tamez; Jeffrey A. Fredenburg; Michael P. Flynn (ESSCIRC, 2010)

A 90MS/s 11MHz bandwidth 62dB SNDR noise-shaping SAR ADC. - Jeffrey Fredenburg; Michael P. Flynn (ISSCC, 2012)

A wirelessly powered log-based closed-loop deep brain stimulation SoC with two-way wireless telemetry for treatment of neurological disorders. - Hyo-Gyuem Rhew; Jaehun Jeong; Jeffrey A. Fredenburg; Sunjay Dodani; Parag G. Patil; Michael P. Flynn (VLSIC, 2012)

A 90-MS/s 11-MHz-Bandwidth 62-dB SNDR Noise-Shaping SAR ADC. - Jeffrey Fredenburg; Michael P. Flynn (IEEE J. Solid State Circuits, 2012)

Statistical Analysis of ENOB and Yield in Binary Weighted ADCs and DACS With Random Element Mismatch. - Jeffrey Fredenburg; Michael P. Flynn (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

An N-path filter enhanced low phase noise ring VCO. - Chunyang Zhai; Jeffrey Fredenburg; John Bell; Michael P. Flynn (VLSIC, 2014)

A Fully Self-Contained Logarithmic Closed-Loop Deep Brain Stimulation SoC With Wireless Telemetry and Wireless Power Management. - Hyo-Gyuem Rhew; Jaehun Jeong; Jeffrey A. Fredenburg; Sunjay Dodani; Parag G. Patil; Michael P. Flynn (IEEE J. Solid State Circuits, 2014)

ADC trends and impact on SAR ADC architecture and analysis. - Jeffrey Fredenburg; Michael P. Flynn (CICC, 2015)

Enabling closed-loop neural interface: A bi-directional interface circuit with stimulation artifact cancellation and cross-channel CM noise suppression. - Adam E. Mendrela; Jihyun Cho; Jeffrey A. Fredenburg; Cynthia A. Chestek; Michael P. Flynn; Euisik Yoon (VLSIC, 2015)

A 16-channel noise-shaping machine learning analog-digital interface. - Fred N. Buhler; Adam E. Mendrela; Yong Lim; Jeffrey A. Fredenburg; Michael P. Flynn (VLSI Circuits, 2016)

A Bidirectional Neural Interface Circuit With Active Stimulation Artifact Cancellation and Cross-Channel Common-Mode Noise Suppression. - Adam E. Mendrela; Jihyun Cho; Jeffrey A. Fredenburg; Vivek Nagaraj; Theoden I. Netoff; Michael P. Flynn; Euisik Yoon (IEEE J. Solid State Circuits, 2016)

A 1.5-GHz 6.144T Correlations/s 64 × 64 Cross-Correlator With 128 Integrated ADCs for Real-Time Synthetic Aperture Imaging. - John Bell; Phil Knag; Shuanghong Sun; Yong Lim; Thomas Chen 003; Jeffrey Fredenburg; Chia-Hsiang Chen; Chunyang Zhai; Aaron Z. Rocca; Nicholas Collins; Andres Tamez; Jorge Pernillo; et al. (IEEE J. Solid State Circuits, 2017)

Synchronous Die-to-Die Signaling Using Aeonic Connect. - Marcus van Ierssel; Fred N. Buhler; David Moore; Jeffrey Fredenburg (CICC, 2023)