A Hierarchical Test Scheme for System-On-Chip Designs. - Jin-Fu Li 001; Hsin-Jung Huang; Jeng-Bin Chen; Chih-Pin Su; Cheng-Wen Wu; Chuang Cheng; Shao-I Chen; Chi-Yi Hwang; Hsiao-Ping Lin (DATE, 2002)

A Hierarchical Test Methodology for Systems on Chip. - Jin-Fu Li 001; Hsin-Jung Huang; Jeng-Bin Chen; Chih-Pin Su; Cheng-Wen Wu; Chuang Cheng; Shao-I Chen; Chi-Yi Hwang; Hsiao-Ping Lin (IEEE Micro, 2002)

Multi-Project System-on-Chip (MP-SoC): A Novel Test Vehicle for SoC Silicon Prototyping. - Chun-Ming Huang; Kuen-Jong Lee; Chih-Chyau Yang; Wen-Hsiang Hu; Shi-Shen Wang; Jeng-Bin Chen; Chi-Shi Chen; Lan-Da Van; Chien-Ming Wu; Wei-Chang Tsai; Jing-Yang Jou (SoCC, 2006)