A 1.041-Mb/mm2 27.38-TOPS/W Signed-INT8 Dynamic-Logic-Based ADC-less SRAM Compute-in-Memory Macro in 28nm with Reconfigurable Bitwise Operation for AI and Embedded Applications. - Bonan Yan; Jeng-Long Hsu; Pang-Cheng Yu; Chia-Chi Lee; Yaojun Zhang; Wenshuo Yue; Guoqiang Mei; Yuchao Yang 001; Yue Yang; Hai Li 001; Yiran Chen 001; Ru Huang 001 (ISSCC, 2022)

A 28-nm 28.8-TOPS/W Attention-Based NN Processor With Correlative CIM Ring Architecture and Dataflow-Reshaped Digital-Assisted CIM Array. - Ruiqi Guo; Zhiheng Yue; Yang Wang 089; Hao Li; Te Hu; Yabing Wang; Hao Sun; Jeng-Long Hsu; Yaojun Zhang; Bonan Yan; Leibo Liu; Ru Huang 001; et al. (IEEE J. Solid State Circuits, 2025)