Physics based computing enabling energy efficiency past moore's law. - Jennifer Hasler (GlobalSIP, 2013)

Path planning using a neuron array integrated circuit. - Scott Koziol; Stephen Brink; Jennifer Hasler (GlobalSIP, 2013)

A compact programmable analog classifier using a VMM + WTA network. - Shubha Ramakrishnan; Jennifer Hasler (ICASSP, 2013)

A large-scale FPAA enabling adaptive floating-gate circuits. - Stephen Brink; Jennifer Hasler; Richard B. Wunderlich (MWSCAS, 2013)

Neuron Array With Plastic Synapses and Programmable Dendrites. - Shubha Ramakrishnan; Richard B. Wunderlich; Jennifer Hasler; Suma George (IEEE Trans. Biomed. Circuits Syst., 2013)

A closed-loop charge balancing FPAA circuit with sub-nano-amp DC error for electrical stimulation. - Florian Kölbl; Raphael Guillaume; Jennifer Hasler; Sébastien Joucla; Blaise Yvert; Sylvie Renaud; Noëlle Lewis (BioCAS, 2014)

Analog signal processing on a FPAA/memristor hybrid circuit. - Mika Laiho; Eero Lehtonen; Jennifer O. Hasler; Jiantao Zhou 003; Chao Du; Wei Lu 003; Jussi H. Poikonen (ISCAS, 2014)

Floating gate ISFET for therapeutic drug screening of breast cancer cells. - Sahil Shah; Karen S. Anderson; Jennifer Blain Christen; Jennifer Hasler (ISCAS, 2014)

Three dimensional robot path planning using a field programmable analog array. - Scott Koziol; Richard B. Wunderlich; Jennifer Hasler (MWSCAS, 2014)

Optimal Sparse Approximation with Integrate and Fire Neurons. - Samuel A. Shapero; Mengchen Zhu; Jennifer Hasler; Christopher J. Rozell (Int. J. Neural Syst., 2014)

Adaptive Floating-Gate Circuit Enabled Large-Scale FPAA. - Stephen Brink; Jennifer Hasler; Richard B. Wunderlich (IEEE Trans. Very Large Scale Integr. Syst., 2014)

A Neuromorphic Approach to Path Planning Using a Reconfigurable Neuron Array IC. - Scott Koziol; Stephen Brink; Jennifer Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Speech Processing on a Reconfigurable Analog Platform. - Shubha Ramakrishnan; Arindam Basu; Leung Kin Chiu; Jennifer Hasler; David V. Anderson; Stephen Brink (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Vector-Matrix Multiply and Winner-Take-All as an Analog Classifier. - Shubha Ramakrishnan; Jennifer Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2014)

High-Level Modeling of Analog Computational Elements for Signal Processing Applications. - Craig R. Schlottmann; Jennifer Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Analog systems education: An integrated toolset and FPAA SoC boards. - Michelle Collins; Jennifer Hasler; Suma George (MSE, 2015)

Low-power, serial interface for power-constrained devices. - Brian P. Degnan; Jennifer Hasler (MWSCAS, 2015)

FPAA/Memristor Hybrid Computing Infrastructure. - Mika Laiho; Jennifer O. Hasler; Jiantao Zhou 003; Chao Du; Wei Lu 003; Eero Lehtonen; Jussi H. Poikonen (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Reconfigurable analog classifier for knee-joint rehabilitation. - Sahil Shah; Hakan Toreyin; Omer T. Inan; Jennifer Hasler (EMBC, 2016)

Transforming mixed-signal circuits class through SoC FPAA IC, PCB, and toolset. - Jennifer Hasler; Sihwan Kim; Sahil Shah; Farhan Adil; Michelle Collins; Scott Koziol; Stephen Nease (EWME, 2016)

An approach to using RASP tools in analog systems education. - Michelle Collins; Jennifer Hasler; Sahil Shah (FIE, 2016)

Opportunities in physical computing driven by analog realization. - Jennifer Hasler (ICRC, 2016)

A proof-of-concept classifier for acoustic signals from the knee joint on a FPAA. - Sahil Shah; Caitlin N. Teague; Omer T. Inan; Jennifer Hasler (IEEE SENSORS, 2016)

Live demonstration: FPAA Demonstration Controlled through Android-Based Device. - Benjamin Bolte; Sahil Shah; Sihwan Kim; Philip Hwang; Jennifer Hasler (ISCAS, 2016)

On the temperature dependence of subthreshold currents in MOS electron inversion layers, revisited. - Brian P. Degnan; Jennifer Hasler (ISCAS, 2016)

SoC FPAA IC, PCB, and tool demonstration. - Sihwan Kim; Farhan Adil; Scott Koziol; Stephen Nease; Michelle Collins; Sahil Shah; Matt Kagle; Jennifer Hasler (ISCAS, 2016)

A remote FPAA system for research and education. - Sahil Shah; Jennifer Hasler; Sihwan Kim; Ishan Lal; Matt Kagle; Michelle Collins (ISCAS, 2016)

Demonstration of a remote FPAA system for research and education. - Sahil Shah; Jennifer Hasler; Sihwan Kim; Ishan Lal; Matt Kagle; Michelle Collins (ISCAS, 2016)

Assessing Trends in Performance per Watt for Signal Processing Applications. - Brian P. Degnan; Bo Marr; Jennifer Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2016)

A Programmable and Configurable Mixed-Mode FPAA SoC. - Suma George; Sihwan Kim; Sahil Shah; Jennifer Hasler; Michelle Collins; Farhan Adil; Richard B. Wunderlich; Stephen Nease; Shubha Ramakrishnan (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Integrated Floating-Gate Programming Environment for System-Level ICs. - Sihwan Kim; Jennifer Hasler; Suma George (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Proof-of-concept energy-efficient and real-time hemodynamic feature extraction from bioimpedance signals using a mixed-signal field programmable analog array. - Hakan Toreyin; Sahil Shah; Sinan Hersek; Omer T. Inan; Jennifer Hasler (BHI, 2017)

Floating-gate FPAA calibration for analog system design and built-in self test. - Sihwan Kim; Sahil Shah; Jennifer Hasler (ISCAS, 2017)

Using SoC FPAA and integrated simulator for implementation of circuits and systems in education. - Aishwarya Natarajan; Jennifer Hasler (ISCAS, 2017)

Low power speech detector on a FPAA. - Sahil Shah; Jennifer Hasler (ISCAS, 2017)

SoC FPAA immersed junior level circuits course. - Jennifer Hasler; Aishwarya Natarajan; Sahil Shah; Sihwan Kim (MSE, 2017)

Tuning of Multiple Parameters With a BIST System. - Sahil Shah; Jennifer Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

Single-Objective Path Planning for Autonomous Robots Using Reconfigurable Analog VLSI. - Scott Koziol; Richard B. Wunderlich; Jennifer Hasler; Mike Stilman (IEEE Trans. Syst. Man Cybern. Syst., 2017)

Calibration of Floating-Gate SoC FPAA System. - Sihwan Kim; Sahil Shah; Jennifer Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Embedded Classifiers for Energy-Constrained IoT Network Security. - Jennifer Hasler (Cyber-Physical Systems Security, 2018)

Analog Abstraction, Computation, and Numerical Analysis. - Jennifer Hasler (ISCAS, 2018)

Circuit Implementations Teaching a Junior Level Circuits Course Utilizing the SoC FPAA. - Jennifer Hasler (ISCAS, 2018)

Enabling Embedded Learning and Classification implemented on SoC FPAA devices. - Jennifer Hasler; Sahil Shah (ISCAS, 2018)

Dynamics of Hodgkin Huxley Neuron across chips implemented on a reconfigurable platform. - Aishwarya Natarajan; Jennifer Hasler (ISCAS, 2018)

Large-Scale Neuromorphic Spiking Array Processors: A quest to mimic the brain. - Chetan Singh Thakur; Jamal Molin; Gert Cauwenberghs; Giacomo Indiveri; Kundan Kumar; Ning Qiao; Johannes Schemmel; Runchun Wang; Elisabetta Chicca; Jennifer Olson Hasler; Jae-sun Seo; Shimeng Yu; et al. (CoRR, 2018)

VMM + WTA Embedded Classifiers Learning Algorithm Implementable on SoC FPAA Devices. - Jennifer Hasler; Sahil Shah (IEEE J. Emerg. Sel. Topics Circuits Syst., 2018)

SoC FPAA Hardware Implementation of a VMM+WTA Embedded Learning Classifier. - Sahil Shah; Jennifer Hasler (IEEE J. Emerg. Sel. Topics Circuits Syst., 2018)

Hodgkin-Huxley Neuron and FPAA Dynamics. - Aishwarya Natarajan; Jennifer Hasler (IEEE Trans. Biomed. Circuits Syst., 2018)

Temperature Sensitivity and Compensation on a Reconfigurable Platform. - Sahil Shah; Hakan Toreyin; Jennifer Hasler; Aishwarya Natarajan (IEEE Trans. Very Large Scale Integr. Syst., 2018)

Implementation of Synapses with Hodgkin Huxley Neurons on the FPAA. - Aishwarya Natarajan; Jennifer Hasler (ISCAS, 2019)

A Real-Time Vital-Sign Monitoring in the Physical Domain on a Mixed-Signal Reconfigurable Platform. - Sahil Shah; Hakan Töreyin; Cihan Berk Güngör; Jennifer Hasler (IEEE Trans. Biomed. Circuits Syst., 2019)

Defining Analog Standard Cell Libraries for Mixed-Signal Computing Enabled through Educational Directions. - Jennifer Hasler (ISCAS, 2020)

Analog Solutions of Systems of Linear Equations on a Configurable Platform. - Aishwarya Natarajan; Jennifer Hasler (ISCAS, 2020)

Built-in Self-Test of Vector Matrix Multipliers on a Reconfigurable Device. - Aishwarya Natarajan; Jennifer Hasler (ISCAS, 2020)

Large-Scale Field-Programmable Analog Arrays. - Jennifer Hasler (Proc. IEEE, 2020)

CAD synthesis tools for floating-gate SoC FPAAs. - Sihwan Kim; Sahil Shah; Richard B. Wunderlich; Jennifer Hasler (Des. Autom. Embed. Syst., 2021)

Continuous-Time, Configurable Analog Linear System Solutions With Transconductance Amplifiers. - Jennifer Hasler; Aishwarya Natarajan (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

An SoC FPAA Based Programmable, Ladder-Filter Based, Linear-Phase Analog Filter. - Jennifer Hasler; Sahil Shah (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A Cluster of FPAAs to Recognize Images Using Neural Networks. - Daniel García Moreno; Alberto A. Del Barrio; Guillermo Botella; Jennifer Hasler (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

The Rise of SoC FPAA Devices. - Jennifer Hasler (CICC, 2022)

A Senior-Level Analog IC Design Course built on Open-Source Technologies. - Jennifer Hasler (ACM Great Lakes Symposium on VLSI, 2022)

Special Session: Testing and Characterization for Large-Scale Programmable Analog Systems. - Jennifer Hasler (VTS, 2022)

A Programmable On-Chip Hopf Bifurcation Circuit. - Jennifer Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

BuzzSort: A Linear-Time, Event-Driven Data Conversion and Sorting Framework for Approximate Computing Architectures. - Swagat Bhattacharyya; Linhao Yang; Jennifer O. Hasler (ICRC, 2023)

Physical Computing for Hopfield Networks on a Reconfigurable Analog IC. - Pranav O. Mathews; Jennifer O. Hasler (ISCAS, 2023)

Extrema-Triggered Analog-Digital Conversion for Low-Power Wireless Sensor Nodes. - Swagat Bhattacharyya; Jennifer O. Hasler (MWSCAS, 2023)

Toward Biorealistic Silicon Neural Circuits on Reconfigurable Platforms. - Swagat Bhattacharyya; Pranav O. Mathews; Praveen Raj Ayyappan; Jennifer O. Hasler (MWSCAS, 2023)

Efficient Implementation of a Fully Analog Neural Network on a Reconfigurable Platform. - Afolabi Ige; Jennifer Hasler (MWSCAS, 2023)

Roadmap for Unconventional Computing with Nanotechnology. - Giovanni Finocchio; Supriyo Bandyopadhyay; Peng Lin; Gang Pan 001; J. Joshua Yang; Riccardo Tomasello; Christos Panagopoulos; Mario Carpentieri; Vito Puliafito; Johan Åkerman; Hiroki Takesue; Amit Ranjan Trivedi; et al. (CoRR, 2023)

A Programmable Adaptive-Q BPF Circuit. - Jennifer Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Towards Scalable Digital Modeling of Networks of Biorealistic Silicon Neurons. - Swagat Bhattacharyya; Praveen Raj Ayyappan; Jennifer O. Hasler (IEEE J. Emerg. Sel. Topics Circuits Syst., 2023)

A 65nm and 130nm CMOS Programmable Analog Standard Cell Library for Scalable System Synthesis. - Pranav O. Mathews; Praveen Raj Ayyappan; Afolabi Ige; Swagat Bhattacharyya; Linhao Yang; Jennifer Hasler (CICC, 2024)

Architectural Considerations for Scalable Analog Ising Machines. - Pranav O. Mathews; Jennifer O. Hasler (ICRC, 2024)

Programmable Analog System Benchmarks Leading to Efficient Analog Computation Synthesis. - Jennifer Hasler; Cong Hao (ACM Trans. Reconfigurable Technol. Syst., 2024)

A 130nm CMOS Programmable Analog Standard Cell Library. - Jennifer Hasler; Praveen Raj Ayyappan; Afolabi Ige; Pranav O. Mathews (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Hopfield vs Ising: A Comparison on the SoC FPAA. - Pranav O. Mathews; Jennifer O. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A 65 nm CMOS Analog Programmable Standard Cell Library for Mixed-Signal Computing. - Pranav O. Mathews; Praveen Raj Ayyappan; Afolabi Ige; Swagat Bhattacharyya; Linhao Yang; Jennifer O. Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2024)

ASHES 1.5: Analog Computing Synthesis for FPAAs and ASICs. - Afolabi Ige; Jennifer Hasler (DATE, 2025)

Historical perspective and opportunity for computing in memory using floating-gate and resistive non-volatile computing including neuromorphic computing. - Jennifer Hasler; Arindam Basu (Neuromorph. Comput. Eng., 2025)

A Programmable and Reconfigurable CMOS Analog Hopfield Network for NP-Hard Problems. - Pranav O. Mathews; Jennifer O. Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2025)