Improving Code Efficiency for Reconfigurable VLIW Processors. - Steffen Köhler; Jens Braunes; Sergej Sawitzki; Rainer G. Spallek (IPDPS, 2002)

RECAST: An Evaluation Framework for Coarse-Grain Reconfigurable Architectures. - Jens Braunes; Steffen Köhler; Rainer G. Spallek (ARCS, 2004)

Increasing ILP of RISC Microprocessors Through Control-Flow Based Reconfiguration. - Steffen Köhler; Jens Braunes; Thomas Preußer; Martin Zabel; Rainer G. Spallek (FPL, 2004)

Ein Zwischenformat-Profiler für das RECAST-Framework. - Jens Braunes; Steffen Köhler; Annett Königsmann; Rainer G. Spallek (ARCS Workshops, 2005)

A Compiler-Oriented Architecture Description for Reconfigurable Systems. - Jens Braunes; Rainer G. Spallek (ARC, 2006)

Efficiency of Dynamic Reconfigurable Datapath Extensions – A Case Study. - Steffen Köhler; Jan Schirok; Jens Braunes; Rainer G. Spallek (ARC, 2008)

Generating the trace qualification configuration for MCDS from a high level language. - Jens Braunes; Rainer G. Spallek (DATE, 2009)