Hardware/Software Co-Training by FPGA/ASIC Synthesis and programming of a RISC Microprocessor-Core. - Jens E. Becker; Carsten Bieser; Alexander Thomas; Klaus D. Müller-Glaser; Jürgen Becker 001 (MSE, 2003)

Energy-Efficient NoC for Best-Effort Communication. - Pascal T. Wolkotte; Gerard J. M. Smit; Jens E. Becker (FPL, 2005)

Energy Model of Networks-on-Chip and a Bus. - Pascal T. Wolkotte; Gerard J. M. Smit; Nikolay Kavaldjiev; Jens E. Becker; Jürgen Becker 001 (SoC, 2005)