Fast DES Implementation for FPGAs and Its Application to a Universal Key-Search Machine. - Jens-Peter Kaps; Christof Paar (Selected Areas in Cryptography, 1998)

DES auf FPGAs - Hochgeschwindigkeits-Architekturen für den Data Encryption Standard auf rekonfigurierbarer Hardware. - Jens-Peter Kaps; Christof Paar (Datenschutz und Datensicherheit, 1999)

Public Key Cryptography in Sensor Networks - Revisited. - Gunnar Gaubatz; Jens-Peter Kaps; Berk Sunar (ESAS, 2004)

State of the Art in Ultra-Low Power Public Key Cryptography for Wireless Sensor Networks. - Gunnar Gaubatz; Jens-Peter Kaps; Erdinç Öztürk; Berk Sunar (PerCom Workshops, 2005)

Energy Scalable Universal Hashing. - Jens-Peter Kaps; Kaan Yüksel; Berk Sunar (IEEE Trans. Computers, 2005)

Energy Comparison of AES and SHA-1 for Ubiquitous Computing. - Jens-Peter Kaps; Berk Sunar (EUC Workshops, 2006)

Cryptography on a Speck of Dust. - Jens-Peter Kaps; Gunnar Gaubatz; Berk Sunar (Computer, 2007)

Chai-Tea, Cryptographic Hardware Implementations of xTEA. - Jens-Peter Kaps (INDOCRYPT, 2008)

DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs. - Rajesh Velegalati; Jens-Peter Kaps (FPL, 2009)

Compact FPGA implementation of Camellia. - Panasayya Yalla; Jens-Peter Kaps (FPL, 2009)

Lightweight Cryptography for FPGAs. - Panasayya Yalla; Jens-Peter Kaps (ReConFig, 2009)

DPA Resistant AES on FPGA Using Partial DDL. - Jens-Peter Kaps; Rajesh Velegalati (FCCM, 2010)

ATHENa - Automated Tool for Hardware EvaluatioN: Toward Fair and Comprehensive Benchmarking of Cryptographic Hardware Using FPGAs. - Kris Gaj; Jens-Peter Kaps; Venkata Amirineni; Marcin Rogawski; Ekawat Homsirikamol; Benjamin Y. Brewster (FPL, 2010)

Techniques to enable the use of Block RAMs on FPGAS with Dynamic and Differential Logic. - Rajesh Velegalati; Jens-Peter Kaps (ICECS, 2010)

Investigation of DPA Resistance of Block RAMs in Cryptographic Implementations on FPGAs. - Shaunak Shah; Rajesh Velegalati; Jens-Peter Kaps; David Hwang (ReConFig, 2010)

A Configurable Ring-Oscillator-Based PUF for Xilinx FPGAs. - Xin Xin; Jens-Peter Kaps; Kris Gaj (DSD, 2011)

Improving Security of SDDL Designs through Interleaved Placement on Xilinx FPGAs. - Rajesh Velegalati; Jens-Peter Kaps (FPL, 2011)

Lightweight Implementations of SHA-3 Candidates on FPGAs. - Jens-Peter Kaps; Panasayya Yalla; Kishore Kumar Surapathi; Bilal Habib; Susheel Vadlamudi; Smriti Gurung; John Pham (INDOCRYPT, 2011)

Efficient Hardware Accelerator for IPSec Based on Partial Reconfiguration on Xilinx FPGAs. - Ahmad Salman; Marcin Rogawski; Jens-Peter Kaps (ReConFig, 2011)

FPGA PUF Based on Programmable LUT Delays. - Bilal Habib; Kris Gaj; Jens-Peter Kaps (DSD, 2013)

Glitch Detection in Hardware Implementations on FPGAs Using Delay Based Sampling Techniques. - Rajesh Velegalati; Kinjal Shah; Jens-Peter Kaps (DSD, 2013)

Efficient SR-Latch PUF. - Bilal Habib; Jens-Peter Kaps; Kris Gaj (ARC, 2015)

Comparison of multi-purpose cores of Keccak and AES. - Panasayya Yalla; Ekawat Homsirikamol; Jens-Peter Kaps (DATE, 2015)

An area-optimized serial implementation of ICEPOLE authenticated encryption schemes. - Michael Tempelmeier; Fabrizio De Santis; Jens-Peter Kaps; Georg Sigl (HOST, 2016)

CAESAR Hardware API. - Ekawat Homsirikamol; William Diehl; Ahmed Ferozpuri; Farnoud Farahmand; Panasayya Yalla; Jens-Peter Kaps; Kris Gaj (IACR Cryptol. ePrint Arch., 2016)

Comparison of hardware and software implementations of selected lightweight block ciphers. - William Diehl; Farnoud Farahmand; Panasayya Yalla; Jens-Peter Kaps; Kris Gaj (FPL, 2017)

A light-weight hardware/software co-design for pairing-based cryptography with low power and energy consumption. - Ahmad Salman; William Diehl; Jens-Peter Kaps (FPT, 2017)

Side-channel resistant soft core processor for lightweight block ciphers. - William Diehl; Abubakr Abdulgadir; Jens-Peter Kaps; Kris Gaj (ReConFig, 2017)

A scalable ECC processor implementation for high-speed and lightweight with side-channel countermeasures. - Ahmad Salman; Ahmed Ferozpuri; Ekawat Homsirikamol; Panasayya Yalla; Jens-Peter Kaps; Kris Gaj (ReConFig, 2017)

Evaluation of the CAESAR hardware API for lightweight implementations. - Panasayya Yalla; Jens-Peter Kaps (ReConFig, 2017)

Implementation of efficient SR-Latch PUF on FPGA and SoC devices. - Bilal Habib; Jens-Peter Kaps; Kris Gaj (Microprocess. Microsystems, 2017)

Fixing the CLOC with Fine-grain Leakage Analysis. - William Diehl; Farnoud Farahmand; Abubakr Abdulgadir; Jens-Peter Kaps; Kris Gaj (ASHES@CCS, 2018)

Face-off Between the CAESAR Lightweight Finalists: ACORN vs. Ascon. - Farnoud Farahmand; Abubakr Abdulgadir; Jens-Peter Kaps; Kris Gaj (FPT, 2018)

The CAESAR-API in the real world - Towards a fair evaluation of hardware CAESAR candidates. - Michael Tempelmeier; Fabrizio De Santis; Georg Sigl; Jens-Peter Kaps (HOST, 2018)

Experimental Power and Performance Evaluation of CAESAR Hardware Finalists. - Michael Tempelmeier; Georg Sigl; Jens-Peter Kaps (ReConFig, 2018)

Comparing the Cost of Protecting Selected Lightweight Block Ciphers against Differential Power Analysis in Low-Cost FPGAs. - William Diehl; Abubakr Abdulgadir; Jens-Peter Kaps; Kris Gaj (Comput., 2018)

Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers. - William Diehl; Abubakr Abdulgadir; Farnoud Farahmand; Jens-Peter Kaps; Kris Gaj (Cryptogr., 2018)

Improved Lightweight Implementations of CAESAR Authenticated Ciphers. - Farnoud Farahmand; William Diehl; Abubakr Abdulgadir; Jens-Peter Kaps; Kris Gaj (IACR Cryptol. ePrint Arch., 2018)

An Open-Source Platform for Evaluation of Hardware Implementations of Lightweight Authenticated Ciphers. - Abubakr Abdulgadir; William Diehl; Jens-Peter Kaps (ReConFig, 2019)

Vulnerability Analysis of a Soft Core Processor through Fine-grain Power Profiling. - William Diehl; Abubakr Abdulgadir; Jens-Peter Kaps (IACR Cryptol. ePrint Arch., 2019)

Face-off between the CAESAR Lightweight Finalists: ACORN vs. Ascon. - William Diehl; Farnoud Farahmand; Abubakr Abdulgadir; Jens-Peter Kaps; Kris Gaj (IACR Cryptol. ePrint Arch., 2019)

A Comprehensive Framework for Fair and Efficient Benchmarking of Hardware Implementations of Lightweight Cryptography. - Jens-Peter Kaps; William Diehl; Michael Tempelmeier; Farnoud Farahmand; Ekawat Homsirikamol; Kris Gaj (IACR Cryptol. ePrint Arch., 2019)

Lightweight Implementation of the LowMC Block Cipher Protected Against Side-Channel Attacks. - Javad Bahrami; Viet Ba Dang; Abubakr Abdulgadir; Khaled N. Khasawneh; Jens-Peter Kaps; Kris Gaj (ASHES@CCS, 2020)

FPGA Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process: Methodology, Metrics, Tools, and Results. - Kamyar Mohajerani; Richard Haeussler; Rishub Nagpal; Farnoud Farahmand; Abubakr Abdulgadir; Jens-Peter Kaps; Kris Gaj (IACR Cryptol. ePrint Arch., 2020)

Hardware Benchmarking of Round 2 Candidates in the NIST Lightweight Cryptography Standardization Process. - Kamyar Mohajerani; Richard Haeussler; Rishub Nagpal; Farnoud Farahmand; Abubakr Abdulgadir; Jens-Peter Kaps; Kris Gaj (DATE, 2021)

Side-channel Resistant Implementations of a Novel Lightweight Authenticated Cipher with Application to Hardware Security. - Abubakr Abdulgadir; Sammy Lin; Farnoud Farahmand; Jens-Peter Kaps; Kris Gaj (ACM Great Lakes Symposium on VLSI, 2021)

A Lightweight Implementation of Saber Resistant Against Side-Channel Attacks. - Abubakr Abdulgadir; Kamyar Mohajerani; Viet Ba Dang; Jens-Peter Kaps; Kris Gaj (IACR Cryptol. ePrint Arch., 2021)

Enhancing Information Security Courses With a Remotely Accessible Side-Channel Analysis Setup. - Abubakr Abdulgadir; Jens-Peter Kaps; Ahmad Salman (ACM Great Lakes Symposium on VLSI, 2022)

SCA Evaluation and Benchmarking of Finalists in the NIST Lightweight Cryptography Standardization Process. - Kamyar Mohajerani; Luke Beckwith; Abubakr Abdulgadir; Eduardo Ferrufino; Jens-Peter Kaps; Kris Gaj (IACR Cryptol. ePrint Arch., 2023)

Power Side-Channel Key Recovery Attack on a Hardware Implementation of BIKE. - Luke Beckwith; Huizhen Zhou; Jens-Peter Kaps; Kris Gaj (AsianHOST, 2024)

FOBOS 3: an open-source platform for side-channel analysis and benchmarking. - Eduardo Ferrufino; Luke Beckwith; Abubakr Abdulgadir; Jens-Peter Kaps (J. Cryptogr. Eng., 2025)