Ordered depth-first layouts for ray tracing. - Jae-Ho Nah; Jeong-Soo Park 004; Jin-Woo Kim 004; Chanmin Park; Tack-Don Han (SIGGRAPH ASIA (Sketches), 2010)

The design of a texture mapping unit with effective MIP-map level selection for real-time ray tracing. - Woo-Chan Park; Dong-Seok Kim; Jeong-Soo Park 004; Sangduk Kim; Hong-Sik Kim; Tack-Don Han (IEICE Electron. Express, 2011)

An effective depth data memory system using an escape count buffer for 3D rendering processors. - Woo-Chan Park; Jin-Hong Park; Woo-Nam Chung; Jeong-Soo Park 004; Sangduk Kim; Hong-Sik Kim; Young-Sik Kim; Tack-Don Han (IEICE Electron. Express, 2011)

T&I engine: traversal and intersection engine for hardware accelerated ray tracing. - Jae-Ho Nah; Jeong-Soo Park 004; Chanmin Park; Jin-Woo Kim 004; Yun-Hye Jung; Woo-Chan Park; Tack-Don Han (ACM Trans. Graph., 2011)

Mobile GPU shader processor based on non-blocking Coarse Grained Reconfigurable Arrays architecture. - Kwontaek Kwon; Sungjin Son; Jeong-Soo Park 004; Jeongae Park; Sangoak Woo; Seokyoon Jung; Soojung Ryu (FPT, 2013)

Node pre-fetching architecture for real-time ray tracing. - Jeong-Soo Park 004; Woo-Chan Park; Jae-Ho Nah; Tack-Don Han (IEICE Electron. Express, 2013)

HART: A Hybrid Architecture for Ray Tracing Animated Scenes. - Jae-Ho Nah; Jin-Woo Kim 004; Junho Park; Won-Jong Lee; Jeong-Soo Park 004; Seokyoon Jung; Woo-Chan Park; Dinesh Manocha; Tack-Don Han (IEEE Trans. Vis. Comput. Graph., 2015)