A table look-up model using a 3-D isoparametric shape function with improved convergency. - Dae-Hyung Cho; Tae-Han Kim; Jeong-Taek Kong (ICCAD, 1989)

Improving Digital MOS Macromodel Accuracy. - Jeong-Taek Kong; Syed Zakir Hussain; David Overhauser (ISCAS, 1995)

Combining RC-Interconnect Effects with Nonlinear MOS Macromodels. - Jeong-Taek Kong; David Overhauser (ISCAS, 1995)

Methods to improve digital MOS macromodel accuracy. - Jeong-Taek Kong; David Overhauser (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995)

An efficient statistical analysis methodology and its application to high-density DRAMs. - Sang-Hoon Lee; Chang-hoon Choi; Jeong-Taek Kong; Wong-Seong Lee; Jei-Hwan Yoo (ICCAD, 1997)

Dynamic power estimation using the probabilistic contribution measure (PCM). - HoonSang Jin; Myung-Soo Jang; Jin-Suk Song; Jin-Yong Lee; Taek-Soo Kim; Jeong-Taek Kong (ISLPED, 1999)

S-TFT: an analytical model of polysilicon thin-film transistors for circuit simulation. - Gi-Young Yang; Yeong-Gil Kim; Taek-Soo Kim; Jeong-Taek Kong (CICC, 2000)

Three Dimensional Analysis of Thermal Degradation Effects in FDSOI MOSFET's. - Kwan-Do Kim; Young-Kwan Park; Jun-Ha Lee; Jeong-Taek Kong; Hee-Sung Kang; Young-Wug Kim; Seok-Jin Kim (ISQED, 2000)

An Efficient Rule-Based OPC Approach Using a DRC Tool for 0.18mum ASIC. - Ji-Soong Park; Chul-Hong Park; Sang-Uhk Rhie; Yoo-Hyon Kim; Moon-Hyun Yoo; Jeong-Taek Kong; Hyung-Woo Kim; Sun-Il Yoo (ISQED, 2000)

Performance Improvement for High Speed Devices Using E-tests and the SPICE Model. - Tae-Jin Kwon; Sang-Hoon Lee; Tae-Seon Kim; Hoe-Jin Lee; Young-Kwan Park; Taek-Soo Kim; Seok-Jin Kim; Jeong-Taek Kong (ISQED, 2001)

A Hybrid PPC Method Based on the Empirical Etch Model for the 0.14µm DRAM Generation and Beyond. - Chul-Hong Park; Soo-Han Choi; Sang-Uhk Rhie; Dong-Hyun Kim; Jun-Seong Park; Tae-Hwang Jang; Ji-Soong Park; Yoo-Hyon Kim; Moon-Hyun Yoo; Jeong-Taek Kong (ISQED, 2002)

Characterizing the Current Degradation of Abnormally Structured MOS Transistors Using a 3D Poisson Solver. - Jin-Kyu Park; Keun-Ho Lee; Chang-Sub Lee; Gi-Young Yang; Young-Kwan Park; Jeong-Taek Kong (ISQED, 2002)

An MTCMOS design methodology and its application to mobile computing. - Hyo-Sig Won; Kyo-Sun Kim; Kwang-Ok Jeong; Ki-Tae Park; Kyu-Myung Choi; Jeong-Taek Kong (ISLPED, 2003)

Investigation of the capacitance deviation due to metal-fills and the effective interconnect geometry modeling. - Won-Seok Lee; Keun-Ho Lee; Jin-Kyu Park; Tae-Kyung Kim; Young-Kwan Park; Jeong-Taek Kong (ISQED, 2003)

Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis. - Jae-Seok Yang; Jeong-Yeol Kim; Joon-Ho Choi; Moon-Hyun Yoo; Jeong-Taek Kong (ISQED, 2003)

Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design. - Chulho Shin; Young-Taek Kim; Eui-Young Chung; Kyu-Myung Choi; Jeong-Taek Kong; Soo-Kwan Eo (DATE, 2004)

A Variable Reduction Technique for the Analysis of Ultra Large-Scale Power Distribution Networks. - Jong-Eun Koo; Kyung-Ho Lee; Young-Hoe Cheon; Joon-Ho Choi; Moon-Hyun Yoo; Jeong-Taek Kong (ISQED, 2004)

CAD for nanometer silicon design challenges and success. - Jeong-Taek Kong (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Fast and Accurate Transaction Level Modeling of an Extended AMBA2.0 Bus Architecture. - Young-Taek Kim; Taehun Kim; Youngduk Kim; Chulho Shin; Eui-Young Chung; Kyu-Myung Choi; Jeong-Taek Kong; Soo-Kwan Eo (DATE, 2005)

SoC in Nanoera: Challenges and Endless Possibility. - Jeong-Taek Kong (DATE, 2005)

A Fast Lithography Verification Framework for Litho-Friendly Layout Design. - Yong-Chan Ban; Soo-Han Choi; Ki-Hung Lee; Dong-Hyun Kim; Jisuk Hong; Yoo-Hyon Kim; Moon-Hyun Yoo; Jeong-Taek Kong (ISQED, 2005)

Analysis for Complex Power Distribution Networks Considering Densely Populated Vias. - Young-Seok Hong; Heeseok Lee; Joon-Ho Choi; Moon-Hyun Yoo; Jeong-Taek Kong (ISQED, 2005)

PowerViP: Soc power estimation framework at transaction level. - Ikhwan Lee; Hyunsuk Kim; Peng Yang; Sungjoo Yoo; Eui-Young Chung; Kyu-Myung Choi; Jeong-Taek Kong; Soo-Kwan Eo (ASP-DAC, 2006)

Creation and utilization of a virtual platform for embedded software optimization: : an industrial case study. - Sungpack Hong; Sungjoo Yoo; Sheayun Lee; Sangwoo Lee; Hye Jeong Nam; Bum-Seok Yoo; Jaehyung Hwang; Donghyun Song; Janghwan Kim; Jeongeun Kim; HoonSang Jin; Kyu-Myung Choi; et al. (CODES+ISSS, 2006)

Design challenges for next-generation multimedia, game and entertainment platforms. - John M. Cohn; Jeong-Taek Kong; Chris Malachowsky; Rich Tobias; Brendan Traw (DAC, 2006)

A systematic IP and bus subsystem modeling for platform-based system design. - Junhyung Um; Woo-Cheol Kwon; Sungpack Hong; Young-Taek Kim; Kyu-Myung Choi; Jeong-Taek Kong; Soo-Kwan Eo; Taewhan Kim 001 (DATE, 2006)

Runtime distribution-aware dynamic voltage scaling. - Sungpack Hong; Sungjoo Yoo; HoonSang Jin; Kyu-Myung Choi; Jeong-Taek Kong; Soo-Kwan Eo (ICCAD, 2006)

Sensing Margin Analysis of MLC Flash Memories Using a Novel Unified Statistical Model. - Young-Gu Kim; Sang-Hoon Lee; Dae-Han Kim; Jae-Woo Im; Sung-Eun Yu; Dae-Wook Kim; Young-Kwan Park; Jeong-Taek Kong (ISQED, 2006)

SilcVerify: An Efficient Substrate Coupling Noise Simulation Tool for High-Speed & Nano-Scaled Memory Design. - Jeong-Yeol Kim; Ho-Soon Shin; Jong-Bae Lee; Moon-Hyun Yoo; Jeong-Taek Kong (ISQED, 2007)

Tipping Point for New Design Technologies: DFM, Low Power and ESL. - Jeong-Taek Kong (ISQED, 2007)

Roundtable: Design and CAD Challenges for Leading-Edge Multimedia Designs. - Andrew B. Kahng; Ira Chayut; John M. Cohn; Toshihiro Hattori; Jeong-Taek Kong; Pierre G. Paulin; Rich Tobias (IEEE Des. Test Comput., 2007)

Low-power dual-supply clock networks with clock gating and frequency doubling. - Hoi-Jin Lee; Jong-Woo Kim; Tae Hee Han; Jae-Cheol Son; Jeong-Taek Kong; Bai-Sun Kong (IEICE Electron. Express, 2012)

Hybrid Compact Modeling Strategy: A Fully-Automated and Accurate Compact Model with Physical Consistency. - Jinyoung Choi; HyunJoon Jeong; Jeong-Taek Kong; Soyoung Kim (ASP-DAC, 2025)