Dual-Phase Tapped-Delay-Line Time-to-Digital Converter With On-the-Fly Calibration Implemented in 40 nm FPGA. - Jun Yeon Won; Sun Il Kwon; Hyun Suk Yoon; Guen Bae Ko; Jeong-Whan Son; Jae Sung Lee (IEEE Trans. Biomed. Circuits Syst., 2016)

Development and Initial Results of a Brain PET Insert for Simultaneous 7-Tesla PET/MRI Using an FPGA-Only Signal Digitization Method. - Jun Yeon Won; Haewook Park; Seung-Eun Lee; Jeong-Whan Son; Yina Chung; Guen Bae Ko; Kyeong Yun Kim; Junghyun Song; Seongho Seo; Yeunchul Ryu; Jun-Young Chung; Jae Sung Lee (IEEE Trans. Medical Imaging, 2021)