Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis. - Jae-Seok Yang; Jeong-Yeol Kim; Joon-Ho Choi; Moon-Hyun Yoo; Jeong-Taek Kong (ISQED, 2003)

SilcVerify: An Efficient Substrate Coupling Noise Simulation Tool for High-Speed & Nano-Scaled Memory Design. - Jeong-Yeol Kim; Ho-Soon Shin; Jong-Bae Lee; Moon-Hyun Yoo; Jeong-Taek Kong (ISQED, 2007)

LoRa-based Mesh Network for IoT Applications. - Heon Huh; Jeong-Yeol Kim (WF-IoT, 2019)