Development of Wireless RFID Glove for Various Applications. - Chang Won Lee; Min Chul Kim; Jinwoo Park; Jeonghoon Oh; Kihwan Eom (SUComS, 2010)

Off-state degradation with ac bias in PMOSFET. - Segeun Park; Hyuckchai Jung; Jeonghoon Oh; Ilgweon Kim; Hyoungsun Hong; Gyoyoung Jin; Yonghan Roh (Microelectron. Reliab., 2016)

A sub-0.85V, 6.4GBP/S/Pin TX-Interleaved Transceiver with Fast Wake-Up Time Using 2-Step Charging Control and VOHCalibration in 20NM DRAM Process. - Jin-Hyeok Baek; Chang-Kyo Lee; Kiho Kim; Daesik Moon; Gil-Hoon Cha; Jin-Seok Heo; Min-Su Ahn; Dong-Ju Kim; Jae-Joon Song; Seokhong Kwon; Jongmin Kim; Kyung-Soo Kim; et al. (VLSI Circuits, 2018)

Validation of Static and Dynamic Balance Assessment Using Microsoft Kinect for Young and Elderly Populations. - Moataz Eltoukhy; Christopher Kuenze; Jeonghoon Oh; Joseph F. Signorile (IEEE J. Biomed. Health Informatics, 2018)

Measuring Torque Production with a Robotic Exoskeleton during Cervical Transcutaneous Spinal Stimulation. - Erin E. Mahan; Nathan Dunkelberger; Jeonghoon Oh; Madison Simmons; Blesson Varghese; Dimitry Sayenko; Marcia K. O'Malley (ICORR, 2022)

Investigation of Sub-20nm 4th generation DRAM cell transistor's parasitic resistance and scalable methodology for Sub-20nm era. - Shinwoo Jeong; Jin-Seong Lee; Jiuk Jang; Jooncheol Kim; Hyunsu Shin; Jihun Kim; Jeongwoo Song; Dongsoo Woo; Jeonghoon Oh; Jooyoung Lee (IRPS, 2023)

Enhanced DRAM Single Bit Characteristics from Process Control of Chlorine. - Taiuk Rim; Kyosuk Che; Sehyun Kwon; Jin-Seong Lee; Jeonghoon Oh; Hyodong Ban; Jooyoung Lee (IRPS, 2023)

Analysis of Intermittent Single-bit Failure on 10-nm node generation DRAM Devices. - Hyewon Seo; Taiuk Rim; Eunsun Lee; Sekyoung Jang; Kyosuk Chae; Jeonghoon Oh; Hyodong Ban; Jooyoung Lee (IRPS, 2023)

Investigation on NBTI Control Techniques of HKMG Transistors for Low-power DRAM applications. - Wonju Sung; Hyun Seung Kim; Jung Hoon Han; Seguen Park; Jeonghoon Oh; Hyodong Ban; Jooyoung Lee (IRPS, 2023)

14nm DRAM Development and Manufacturing. - Kanguk Kim; Youngwoo Son; Hoin Ryu; Byunghyun Lee; Jooncheol Kim; Hyunsu Shin; Joonyoung Kang; Jihun Kim; Shinwoo Jeong; Kyosuk Chae; Dongkak Lee; Ilwoo Jung; et al. (VLSI Technology and Circuits, 2023)

Effect of Back Gate on Word Line Disturb Immunity of a Vertical Channel DRAM Cell Array Transistor. - Moonyoung Jeong; Sangho Lee; Yootak Jun; Kiseok Lee; Seokhan Park; Jeonghoon Oh; Ilgweon Kim; Jemin Park (IRPS, 2024)

A Metal Dual Work-Function Gate (MDWG) for the Continuous Scaling of DRAM Cell Transistors. - Junsoo Kim; Hyun Jung Lee; Sung Ho Jang; Jun Bum Lee; Ilgweon Kim; Jeonghoon Oh; Jemin Park; Jaihyuk Song (VLSI Technology and Circuits, 2024)

Cell to Core-Periphery Overlap (C2O) Based on BCAT for Next Generation DRAM. - Kiseok Lee; Hongjun Lee; Hyungeun Choi; Jeongsu Kim; Kyunghwan Kim; Moonyoung Jeong; Soohyun Bae; Hyebin Kim; Jiyun Lee; Minsoo Kim; Keunnam Kim; Huijung Kim; et al. (VLSI Technology and Circuits, 2024)

A Study on the Origin of Dynamic Charge Loss of Next Generation DRAM Cell Array Transistor. - Moonyoung Jeong; Hyungjun Noh; Sangho Lee; Yootak Jun; Jeonghoon Oh; Jemin Park; Jaihyuk Song (IRPS, 2025)