Hardware-Efficient SoftMax Architecture With Bit-Wise Exponentiation and Reciprocal Calculation. - Jeongmin Kim 001; Sungho Kim; Kangjoon Choi; In-Cheol Park (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Hardware-Friendly Approximation for Swish Activation and Its Implementation. - Kangjoon Choi; Sungho Kim; Jeongmin Kim 001; In-Cheol Park (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

High-Speed CMOS Synchronous Binary Counter With Constant Counting Rate. - Sungho Kim; Jeongmin Kim 001; In-Cheol Park (IEEE Access, 2025)

Energy-Efficient Syndrome Calculation Architecture for BCH Decoders. - Jeongmin Kim 001; Jaehoon Kwon; Hansol Jeong; In-Cheol Park (IEEE Trans. Very Large Scale Integr. Syst., 2025)

Low-Complexity Bit-Error Rate Evaluation of Algebraic Codes. - Jaehoon Kwon; Hansol Jeong; Jeongmin Kim 001; In-Cheol Park (IEEE Commun. Lett., 2026)

Hardware-Efficient Unified Approximation for Implementing Diverse Smooth Activation Functions. - Jeongmin Kim 001; Kangjoon Choi; In-Cheol Park (IEEE Trans. Computers, 2026)