A Low-Power Post-LPDDR4 Interface Using AC Termination at RX and an Active Inductor at TX. - Jeongsik Yoo; Yeonho Lee 002; Yoonjae Choi; Hyunsu Park; Sanghune Park; Chulwoo Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

30-Gb/s 1.11-pJ/bit Single-Ended PAM-3 Transceiver for High-Speed Memory Links. - Hyunsu Park; Junyoung Song; Jincheol Sim; Yoonjae Choi; Jonghyuck Choi; Jeongsik Yoo; Chulwoo Kim (IEEE J. Solid State Circuits, 2021)