A 2.2 NEF Neural-Recording Amplifier Using Discrete-Time Parametric Amplification. - Tae-Kwang Jang; Jongyup Lim; Kyojin David Choo; Samuel Nason; Jeongsup Lee; Jeongsup Oh; Seokhyeon Jeong; Cynthia A. Chestek; Dennis Sylvester; David T. Blaauw (VLSI Circuits, 2018)

An Adaptive Body-Biaslna SoC Using in Situ Slack Monitoring for Runtime Replica Calibration. - Mehdi Saligane; Jeongsup Lee; Qing Dong 001; Makoto Yasuda; Kazuyuki Kumeno; Fumitaka Ohno; Satoru Miyoshi; Masaru Kawaminami; David T. Blaauw; Dennis Sylvester (VLSI Circuits, 2018)

Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project. - Tutu Ajayi; Vidya A. Chhabria; Mateus Fogaça; Soheil Hashemi; Abdelrahman Hosny; Andrew B. Kahng; Minsoo Kim; Jeongsup Lee; Uday Mallappa; Marina Neseem; Geraldo Pradipta; Sherief Reda; et al. (DAC, 2019)

A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT Variation. - Jeongsup Lee; Yiqun Zhang 002; Qing Dong 001; Wootaek Lim; Mehdi Saligane; Yejoong Kim; Seokhyeon Jeong; Jongyup Lim; Makoto Yasuda; Satoru Miyoshi; Masaru Kawaminami; David T. Blaauw; et al. (ISSCC, 2019)

AµProcessor Layer for mm-Scale Die-Stacked Sensing Platforms Featuring Ultra-Low Power Sleep Mode at 125°C. - Jeongsup Lee; Yejoong Kim; Minchang Cho; Makoto Yasuda; Satoru Miyoshi; Masaru Kawaminami; David T. Blaauw; Dennis Sylvester (A-SSCC, 2020)

Fully-Autonomous SoC Synthesis Using Customizable Cell-Based Analog and Mixed-Signal Circuits Generation. - Tutu Ajayi; Sumanth Kamineni; Morteza Fayazi; Yaswanth K. Cherivirala; Kyumin Kwon; Shourya Gupta; Wenbo Duan; Jeongsup Lee; Chien-Hen Chen; Mehdi Saligane; Dennis Sylvester; David T. Blaauw; et al. (VLSI-SoC (Selected Papers), 2020)

A Self-Tuning IoT Processor Using Leakage-Ratio Measurement for Energy-Optimal Operation. - Jeongsup Lee; Satoru Miyoshi; Masaru Kawaminami; David T. Blaauw; Dennis Sylvester; Yiqun Zhang 002; Qing Dong 001; Wootaek Lim; Mehdi Saligane; Yejoong Kim; Seokhyeon Jeong; Jongyup Lim; et al. (IEEE J. Solid State Circuits, 2020)

Design Techniques of Integrated Power Management Circuits for Low Power Edge Devices. - Li Xu 006; Jeongsup Lee; Mehdi Saligane; David T. Blaauw; Dennis Sylvester (CICC, 2021)